{"id":"https://openalex.org/W2042664928","doi":"https://doi.org/10.1016/0165-6074(89)90149-x","title":"On structured gate forest VLSI design","display_name":"On structured gate forest VLSI design","publication_year":1989,"publication_date":"1989-08-01","ids":{"openalex":"https://openalex.org/W2042664928","doi":"https://doi.org/10.1016/0165-6074(89)90149-x","mag":"2042664928"},"language":"en","primary_location":{"id":"doi:10.1016/0165-6074(89)90149-x","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(89)90149-x","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084627615","display_name":"Gerhard Roos","orcid":null},"institutions":[{"id":"https://openalex.org/I4210164948","display_name":"Institut f\u00fcr Mikroelektronik Stuttgart","ror":"https://ror.org/05kw00716","country_code":"DE","type":"nonprofit","lineage":["https://openalex.org/I4210164948"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Gerhard Roos","raw_affiliation_strings":["Institute for Microelectronics Stuttgart, Allmandring 30a, 7000 Stuttgart 80, West Germany"],"affiliations":[{"raw_affiliation_string":"Institute for Microelectronics Stuttgart, Allmandring 30a, 7000 Stuttgart 80, West Germany","institution_ids":["https://openalex.org/I4210164948"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027884991","display_name":"J. Leenstra","orcid":null},"institutions":[{"id":"https://openalex.org/I4210164948","display_name":"Institut f\u00fcr Mikroelektronik Stuttgart","ror":"https://ror.org/05kw00716","country_code":"DE","type":"nonprofit","lineage":["https://openalex.org/I4210164948"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Jens Leenstra","raw_affiliation_strings":["Institute for Microelectronics Stuttgart, Allmandring 30a, 7000 Stuttgart 80, West Germany"],"affiliations":[{"raw_affiliation_string":"Institute for Microelectronics Stuttgart, Allmandring 30a, 7000 Stuttgart 80, West Germany","institution_ids":["https://openalex.org/I4210164948"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5057580958","display_name":"Thomas Schwederski","orcid":null},"institutions":[{"id":"https://openalex.org/I4210164948","display_name":"Institut f\u00fcr Mikroelektronik Stuttgart","ror":"https://ror.org/05kw00716","country_code":"DE","type":"nonprofit","lineage":["https://openalex.org/I4210164948"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Thomas Schwederski","raw_affiliation_strings":["Institute for Microelectronics Stuttgart, Allmandring 30a, 7000 Stuttgart 80, West Germany"],"affiliations":[{"raw_affiliation_string":"Institute for Microelectronics Stuttgart, Allmandring 30a, 7000 Stuttgart 80, West Germany","institution_ids":["https://openalex.org/I4210164948"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034475612","display_name":"Lambert Spaanenburg","orcid":null},"institutions":[{"id":"https://openalex.org/I4210164948","display_name":"Institut f\u00fcr Mikroelektronik Stuttgart","ror":"https://ror.org/05kw00716","country_code":"DE","type":"nonprofit","lineage":["https://openalex.org/I4210164948"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Lambert Spaanenburg","raw_affiliation_strings":["Institute for Microelectronics Stuttgart, Allmandring 30a, 7000 Stuttgart 80, West Germany"],"affiliations":[{"raw_affiliation_string":"Institute for Microelectronics Stuttgart, Allmandring 30a, 7000 Stuttgart 80, West Germany","institution_ids":["https://openalex.org/I4210164948"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5076955019","display_name":"B. Hoefflinger","orcid":null},"institutions":[{"id":"https://openalex.org/I4210164948","display_name":"Institut f\u00fcr Mikroelektronik Stuttgart","ror":"https://ror.org/05kw00716","country_code":"DE","type":"nonprofit","lineage":["https://openalex.org/I4210164948"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Bernd Hoefflinger","raw_affiliation_strings":["Institute for Microelectronics Stuttgart, Allmandring 30a, 7000 Stuttgart 80, West Germany"],"affiliations":[{"raw_affiliation_string":"Institute for Microelectronics Stuttgart, Allmandring 30a, 7000 Stuttgart 80, West Germany","institution_ids":["https://openalex.org/I4210164948"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5084627615"],"corresponding_institution_ids":["https://openalex.org/I4210164948"],"apc_list":null,"apc_paid":null,"fwci":0.9905,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.75154294,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"27","issue":"1-5","first_page":"785","last_page":"792"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.8738867044448853},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8267004489898682},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.60219407081604},{"id":"https://openalex.org/keywords/cad","display_name":"CAD","score":0.5039774775505066},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.41509196162223816},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.36447668075561523},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.32346171140670776},{"id":"https://openalex.org/keywords/engineering-drawing","display_name":"Engineering drawing","score":0.22025051712989807}],"concepts":[{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.8738867044448853},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8267004489898682},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.60219407081604},{"id":"https://openalex.org/C194789388","wikidata":"https://www.wikidata.org/wiki/Q17855283","display_name":"CAD","level":2,"score":0.5039774775505066},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.41509196162223816},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.36447668075561523},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.32346171140670776},{"id":"https://openalex.org/C199639397","wikidata":"https://www.wikidata.org/wiki/Q1788588","display_name":"Engineering drawing","level":1,"score":0.22025051712989807},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/0165-6074(89)90149-x","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(89)90149-x","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8100000023841858,"display_name":"Life below water","id":"https://metadata.un.org/sdg/14"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1968172317","https://openalex.org/W1992302205","https://openalex.org/W2030149113","https://openalex.org/W2052754379","https://openalex.org/W2074537610","https://openalex.org/W2078539216","https://openalex.org/W2094159214","https://openalex.org/W2110312287","https://openalex.org/W2131198957","https://openalex.org/W2134746778","https://openalex.org/W2144976142","https://openalex.org/W6679840254"],"related_works":["https://openalex.org/W3204197061","https://openalex.org/W4251350712","https://openalex.org/W637098845","https://openalex.org/W2410116073","https://openalex.org/W4283025278","https://openalex.org/W3044972437","https://openalex.org/W2134640991","https://openalex.org/W3027318491","https://openalex.org/W1979789826","https://openalex.org/W1986774039"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}