{"id":"https://openalex.org/W2089039337","doi":"https://doi.org/10.1016/0165-6074(88)90134-2","title":"Integrating an on-chip MMU into a highly pipelined architecture","display_name":"Integrating an on-chip MMU into a highly pipelined architecture","publication_year":1988,"publication_date":"1988-08-01","ids":{"openalex":"https://openalex.org/W2089039337","doi":"https://doi.org/10.1016/0165-6074(88)90134-2","mag":"2089039337"},"language":"en","primary_location":{"id":"doi:10.1016/0165-6074(88)90134-2","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(88)90134-2","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5011465268","display_name":"Elliot J Cohen","orcid":null},"institutions":[{"id":"https://openalex.org/I4210130028","display_name":"National Library of Israel","ror":"https://ror.org/03be63z97","country_code":"IL","type":"archive","lineage":["https://openalex.org/I4210130028"]}],"countries":["IL"],"is_corresponding":false,"raw_author_name":"Elliot J Cohen","raw_affiliation_strings":["National Semiconductor (Israel) Ltd. P.O. Box 3007 Herzlia B. 46104, Israel"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Semiconductor (Israel) Ltd. P.O. Box 3007 Herzlia B. 46104, Israel","institution_ids":["https://openalex.org/I4210130028"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048240196","display_name":"Reuven A Marko","orcid":null},"institutions":[{"id":"https://openalex.org/I4210130028","display_name":"National Library of Israel","ror":"https://ror.org/03be63z97","country_code":"IL","type":"archive","lineage":["https://openalex.org/I4210130028"]}],"countries":["IL"],"is_corresponding":false,"raw_author_name":"Reuven A Marko","raw_affiliation_strings":["National Semiconductor (Israel) Ltd. P.O. Box 3007 Herzlia B. 46104, Israel"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Semiconductor (Israel) Ltd. P.O. Box 3007 Herzlia B. 46104, Israel","institution_ids":["https://openalex.org/I4210130028"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5023158275","display_name":"Jonathan Levy","orcid":null},"institutions":[{"id":"https://openalex.org/I4210130028","display_name":"National Library of Israel","ror":"https://ror.org/03be63z97","country_code":"IL","type":"archive","lineage":["https://openalex.org/I4210130028"]}],"countries":["IL"],"is_corresponding":false,"raw_author_name":"Jonathan Levy","raw_affiliation_strings":["National Semiconductor (Israel) Ltd. P.O. Box 3007 Herzlia B. 46104, Israel"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Semiconductor (Israel) Ltd. P.O. Box 3007 Herzlia B. 46104, Israel","institution_ids":["https://openalex.org/I4210130028"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4210130028"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.21761006,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"24","issue":"1-5","first_page":"709","last_page":"713"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9969000220298767,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.9124420881271362},{"id":"https://openalex.org/keywords/translation-lookaside-buffer","display_name":"Translation lookaside buffer","score":0.7454291582107544},{"id":"https://openalex.org/keywords/physical-address","display_name":"Physical address","score":0.7152161598205566},{"id":"https://openalex.org/keywords/virtual-memory","display_name":"Virtual memory","score":0.6283343434333801},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.5721590518951416},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.5407332181930542},{"id":"https://openalex.org/keywords/byte","display_name":"Byte","score":0.5142595171928406},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.49274972081184387},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4839058816432953},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.45674437284469604},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.4470585584640503},{"id":"https://openalex.org/keywords/memory-map","display_name":"Memory map","score":0.4280673861503601},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.4152454733848572},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.41342559456825256},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.36223238706588745},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.30475935339927673},{"id":"https://openalex.org/keywords/overlay","display_name":"Overlay","score":0.2675383985042572}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.9124420881271362},{"id":"https://openalex.org/C116007543","wikidata":"https://www.wikidata.org/wiki/Q1071403","display_name":"Translation lookaside buffer","level":4,"score":0.7454291582107544},{"id":"https://openalex.org/C41036726","wikidata":"https://www.wikidata.org/wiki/Q844824","display_name":"Physical address","level":3,"score":0.7152161598205566},{"id":"https://openalex.org/C76399640","wikidata":"https://www.wikidata.org/wiki/Q189401","display_name":"Virtual memory","level":4,"score":0.6283343434333801},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.5721590518951416},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.5407332181930542},{"id":"https://openalex.org/C43364308","wikidata":"https://www.wikidata.org/wiki/Q8799","display_name":"Byte","level":2,"score":0.5142595171928406},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.49274972081184387},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4839058816432953},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.45674437284469604},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.4470585584640503},{"id":"https://openalex.org/C74426580","wikidata":"https://www.wikidata.org/wiki/Q719484","display_name":"Memory map","level":3,"score":0.4280673861503601},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.4152454733848572},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.41342559456825256},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.36223238706588745},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.30475935339927673},{"id":"https://openalex.org/C136085584","wikidata":"https://www.wikidata.org/wiki/Q910289","display_name":"Overlay","level":2,"score":0.2675383985042572},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/0165-6074(88)90134-2","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(88)90134-2","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":2,"referenced_works":["https://openalex.org/W2004580040","https://openalex.org/W2050915056"],"related_works":["https://openalex.org/W2138847","https://openalex.org/W2381395788","https://openalex.org/W3196094483","https://openalex.org/W4238135788","https://openalex.org/W1698699620","https://openalex.org/W2355566153","https://openalex.org/W261562921","https://openalex.org/W2238595726","https://openalex.org/W2116578804","https://openalex.org/W1421493983"],"abstract_inverted_index":null,"counts_by_year":[{"year":2023,"cited_by_count":1}],"updated_date":"2026-06-22T06:23:43.705686","created_date":"2025-10-10T00:00:00"}
