{"id":"https://openalex.org/W2009319748","doi":"https://doi.org/10.1016/0165-6074(87)90148-7","title":"Machine-independent microprogram address allocation through hierarchical structuring","display_name":"Machine-independent microprogram address allocation through hierarchical structuring","publication_year":1987,"publication_date":"1987-10-01","ids":{"openalex":"https://openalex.org/W2009319748","doi":"https://doi.org/10.1016/0165-6074(87)90148-7","mag":"2009319748"},"language":"en","primary_location":{"id":"doi:10.1016/0165-6074(87)90148-7","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(87)90148-7","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5073233000","display_name":"Sadahiro Isoda","orcid":null},"institutions":[{"id":"https://openalex.org/I2251713219","display_name":"NTT (Japan)","ror":"https://ror.org/00berct97","country_code":"JP","type":"company","lineage":["https://openalex.org/I2251713219"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Sadahiro Isoda","raw_affiliation_strings":["Electrical Communications Laboratories, Nippon Telegraph and Telephone Corporation, 1-2356, Take, Yokosuka, Kanagawa-ken, Japan","Electrical Communications Laboratories, Kanagawa-ken, Japan#TAB#"],"affiliations":[{"raw_affiliation_string":"Electrical Communications Laboratories, Nippon Telegraph and Telephone Corporation, 1-2356, Take, Yokosuka, Kanagawa-ken, Japan","institution_ids":["https://openalex.org/I2251713219"]},{"raw_affiliation_string":"Electrical Communications Laboratories, Kanagawa-ken, Japan#TAB#","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5073233000"],"corresponding_institution_ids":["https://openalex.org/I2251713219"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.15586146,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"19","issue":"4","first_page":"291","last_page":"304"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.9308241605758667},{"id":"https://openalex.org/keywords/firmware","display_name":"Firmware","score":0.8585270047187805},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.7166796922683716},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.5447956919670105},{"id":"https://openalex.org/keywords/jump","display_name":"Jump","score":0.5373958349227905},{"id":"https://openalex.org/keywords/structuring","display_name":"Structuring","score":0.5325288772583008},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.4504221975803375},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4494296908378601},{"id":"https://openalex.org/keywords/hierarchy","display_name":"Hierarchy","score":0.41568922996520996},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.3650701940059662},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3517967462539673},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.3502737879753113},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.17751464247703552},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.1446230709552765},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.13808771967887878}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.9308241605758667},{"id":"https://openalex.org/C67212190","wikidata":"https://www.wikidata.org/wiki/Q104851","display_name":"Firmware","level":2,"score":0.8585270047187805},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.7166796922683716},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.5447956919670105},{"id":"https://openalex.org/C2780695682","wikidata":"https://www.wikidata.org/wiki/Q4005959","display_name":"Jump","level":2,"score":0.5373958349227905},{"id":"https://openalex.org/C2775945657","wikidata":"https://www.wikidata.org/wiki/Q381442","display_name":"Structuring","level":2,"score":0.5325288772583008},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.4504221975803375},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4494296908378601},{"id":"https://openalex.org/C31170391","wikidata":"https://www.wikidata.org/wiki/Q188619","display_name":"Hierarchy","level":2,"score":0.41568922996520996},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.3650701940059662},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3517967462539673},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3502737879753113},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.17751464247703552},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.1446230709552765},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.13808771967887878},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C34447519","wikidata":"https://www.wikidata.org/wiki/Q179522","display_name":"Market economy","level":1,"score":0.0},{"id":"https://openalex.org/C10138342","wikidata":"https://www.wikidata.org/wiki/Q43015","display_name":"Finance","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/0165-6074(87)90148-7","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(87)90148-7","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5,"display_name":"Quality Education","id":"https://metadata.un.org/sdg/4"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1995816806","https://openalex.org/W2001862172","https://openalex.org/W2039616222","https://openalex.org/W2042442473","https://openalex.org/W2093015761","https://openalex.org/W6649360023"],"related_works":["https://openalex.org/W2582981600","https://openalex.org/W4389238932","https://openalex.org/W4387467152","https://openalex.org/W3010413952","https://openalex.org/W4212885212","https://openalex.org/W4253989935","https://openalex.org/W4379115910","https://openalex.org/W4287635472","https://openalex.org/W2810560948","https://openalex.org/W2070793896"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
