{"id":"https://openalex.org/W2018758822","doi":"https://doi.org/10.1016/0165-6074(87)90015-9","title":"Design of a reconfigurable parallel RISC-machine","display_name":"Design of a reconfigurable parallel RISC-machine","publication_year":1987,"publication_date":"1987-08-01","ids":{"openalex":"https://openalex.org/W2018758822","doi":"https://doi.org/10.1016/0165-6074(87)90015-9","mag":"2018758822"},"language":"en","primary_location":{"id":"doi:10.1016/0165-6074(87)90015-9","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(87)90015-9","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5047857627","display_name":"Zden\u011bk Blaz\u011bk","orcid":null},"institutions":[{"id":"https://openalex.org/I44504214","display_name":"Czech Technical University in Prague","ror":"https://ror.org/03kqpb082","country_code":"CZ","type":"education","lineage":["https://openalex.org/I44504214"]}],"countries":["CZ"],"is_corresponding":true,"raw_author_name":"Zdenek Blazek","raw_affiliation_strings":["Czech Technical University, Faculty of Electrical Engineering Department of Computer Science Karlovo n\u00e1m. 13, 121 35 Praha 2, Czechoslovakia","Czech Technical University , Praha, Czechoslovakia"],"affiliations":[{"raw_affiliation_string":"Czech Technical University, Faculty of Electrical Engineering Department of Computer Science Karlovo n\u00e1m. 13, 121 35 Praha 2, Czechoslovakia","institution_ids":["https://openalex.org/I44504214"]},{"raw_affiliation_string":"Czech Technical University , Praha, Czechoslovakia","institution_ids":["https://openalex.org/I44504214"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5090185421","display_name":"Petr Kroha","orcid":"https://orcid.org/0000-0002-1658-3736"},"institutions":[{"id":"https://openalex.org/I44504214","display_name":"Czech Technical University in Prague","ror":"https://ror.org/03kqpb082","country_code":"CZ","type":"education","lineage":["https://openalex.org/I44504214"]}],"countries":["CZ"],"is_corresponding":false,"raw_author_name":"Petr Kroha","raw_affiliation_strings":["Czech Technical University, Faculty of Electrical Engineering Department of Computer Science Karlovo n\u00e1m. 13, 121 35 Praha 2, Czechoslovakia","Czech Technical University , Praha, Czechoslovakia"],"affiliations":[{"raw_affiliation_string":"Czech Technical University, Faculty of Electrical Engineering Department of Computer Science Karlovo n\u00e1m. 13, 121 35 Praha 2, Czechoslovakia","institution_ids":["https://openalex.org/I44504214"]},{"raw_affiliation_string":"Czech Technical University , Praha, Czechoslovakia","institution_ids":["https://openalex.org/I44504214"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5047857627"],"corresponding_institution_ids":["https://openalex.org/I44504214"],"apc_list":null,"apc_paid":null,"fwci":0.9183,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.77797513,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"21","issue":"1-5","first_page":"39","last_page":"46"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9678000211715698,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9678000211715698,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.944599986076355,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9036999940872192,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reconfigurability","display_name":"Reconfigurability","score":0.9350192546844482},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.9090865850448608},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.7139123678207397},{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"Reduced instruction set computing","score":0.5382459163665771},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.5231229662895203},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5201521515846252},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4807974398136139},{"id":"https://openalex.org/keywords/variable","display_name":"Variable (mathematics)","score":0.45495691895484924},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.43743106722831726},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.4101237654685974},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3735613524913788},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.28065162897109985},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.13127106428146362}],"concepts":[{"id":"https://openalex.org/C2780149590","wikidata":"https://www.wikidata.org/wiki/Q7302742","display_name":"Reconfigurability","level":2,"score":0.9350192546844482},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.9090865850448608},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.7139123678207397},{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.5382459163665771},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.5231229662895203},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5201521515846252},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4807974398136139},{"id":"https://openalex.org/C182365436","wikidata":"https://www.wikidata.org/wiki/Q50701","display_name":"Variable (mathematics)","level":2,"score":0.45495691895484924},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.43743106722831726},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.4101237654685974},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3735613524913788},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.28065162897109985},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.13127106428146362},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/0165-6074(87)90015-9","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(87)90015-9","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1582776560","https://openalex.org/W1811377747","https://openalex.org/W1972815688","https://openalex.org/W2018426736","https://openalex.org/W2144090327","https://openalex.org/W6634896018"],"related_works":["https://openalex.org/W2152623100","https://openalex.org/W2096417281","https://openalex.org/W25204318","https://openalex.org/W2138895528","https://openalex.org/W2077035242","https://openalex.org/W3042643149","https://openalex.org/W2026481470","https://openalex.org/W1999203047","https://openalex.org/W3201977823","https://openalex.org/W2362203107"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}