{"id":"https://openalex.org/W2085272037","doi":"https://doi.org/10.1016/0165-6074(86)90076-1","title":"The MADMACS layout system","display_name":"The MADMACS layout system","publication_year":1986,"publication_date":"1986-12-01","ids":{"openalex":"https://openalex.org/W2085272037","doi":"https://doi.org/10.1016/0165-6074(86)90076-1","mag":"2085272037"},"language":"en","primary_location":{"id":"doi:10.1016/0165-6074(86)90076-1","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(86)90076-1","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103436774","display_name":"Patrice Frison","orcid":null},"institutions":[{"id":"https://openalex.org/I2802519937","display_name":"Institut de Recherche en Informatique et Syst\u00e8mes Al\u00e9atoires","ror":"https://ror.org/00myn0z94","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I1326498283","https://openalex.org/I205703379","https://openalex.org/I2802204017","https://openalex.org/I2802519937","https://openalex.org/I28221208","https://openalex.org/I4210127572","https://openalex.org/I4210159245","https://openalex.org/I56067802"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Patrice Frison","raw_affiliation_strings":["IRISA - Campus de Beaulieu 35042 Rennes Cedex, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IRISA - Campus de Beaulieu 35042 Rennes Cedex, France","institution_ids":["https://openalex.org/I2802519937"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5074256206","display_name":"Eric Gautrin","orcid":null},"institutions":[{"id":"https://openalex.org/I2802519937","display_name":"Institut de Recherche en Informatique et Syst\u00e8mes Al\u00e9atoires","ror":"https://ror.org/00myn0z94","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I1326498283","https://openalex.org/I205703379","https://openalex.org/I2802204017","https://openalex.org/I2802519937","https://openalex.org/I28221208","https://openalex.org/I4210127572","https://openalex.org/I4210159245","https://openalex.org/I56067802"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Eric Gautrin","raw_affiliation_strings":["IRISA - Campus de Beaulieu 35042 Rennes Cedex, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IRISA - Campus de Beaulieu 35042 Rennes Cedex, France","institution_ids":["https://openalex.org/I2802519937"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.20281021,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"18","issue":"1-5","first_page":"445","last_page":"452"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.996999979019165,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9908000230789185,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.9007349014282227},{"id":"https://openalex.org/keywords/ic-layout-editor","display_name":"IC layout editor","score":0.7360172271728516},{"id":"https://openalex.org/keywords/macro","display_name":"Macro","score":0.6835034489631653},{"id":"https://openalex.org/keywords/page-layout","display_name":"Page layout","score":0.6532884836196899},{"id":"https://openalex.org/keywords/graphics","display_name":"Graphics","score":0.6360337138175964},{"id":"https://openalex.org/keywords/design-layout-record","display_name":"Design layout record","score":0.624488353729248},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5557469725608826},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.5307391285896301},{"id":"https://openalex.org/keywords/integrated-circuit-layout","display_name":"Integrated circuit layout","score":0.4791354835033417},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.4535549283027649},{"id":"https://openalex.org/keywords/engineering-drawing","display_name":"Engineering drawing","score":0.44328010082244873},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.37879475951194763},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3335517942905426},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.32988440990448},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.31434667110443115},{"id":"https://openalex.org/keywords/computer-graphics","display_name":"Computer graphics (images)","score":0.2863013744354248},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.28275346755981445},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.24819165468215942},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2121303677558899},{"id":"https://openalex.org/keywords/circuit-extraction","display_name":"Circuit extraction","score":0.20077675580978394},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.09232920408248901}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.9007349014282227},{"id":"https://openalex.org/C5546195","wikidata":"https://www.wikidata.org/wiki/Q5969842","display_name":"IC layout editor","level":5,"score":0.7360172271728516},{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.6835034489631653},{"id":"https://openalex.org/C188985296","wikidata":"https://www.wikidata.org/wiki/Q868954","display_name":"Page layout","level":2,"score":0.6532884836196899},{"id":"https://openalex.org/C21442007","wikidata":"https://www.wikidata.org/wiki/Q1027879","display_name":"Graphics","level":2,"score":0.6360337138175964},{"id":"https://openalex.org/C179145894","wikidata":"https://www.wikidata.org/wiki/Q5264353","display_name":"Design layout record","level":5,"score":0.624488353729248},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5557469725608826},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.5307391285896301},{"id":"https://openalex.org/C2765594","wikidata":"https://www.wikidata.org/wiki/Q2624187","display_name":"Integrated circuit layout","level":3,"score":0.4791354835033417},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.4535549283027649},{"id":"https://openalex.org/C199639397","wikidata":"https://www.wikidata.org/wiki/Q1788588","display_name":"Engineering drawing","level":1,"score":0.44328010082244873},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.37879475951194763},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3335517942905426},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.32988440990448},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.31434667110443115},{"id":"https://openalex.org/C121684516","wikidata":"https://www.wikidata.org/wiki/Q7600677","display_name":"Computer graphics (images)","level":1,"score":0.2863013744354248},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.28275346755981445},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.24819165468215942},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2121303677558899},{"id":"https://openalex.org/C26490066","wikidata":"https://www.wikidata.org/wiki/Q17006835","display_name":"Circuit extraction","level":4,"score":0.20077675580978394},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.09232920408248901},{"id":"https://openalex.org/C144133560","wikidata":"https://www.wikidata.org/wiki/Q4830453","display_name":"Business","level":0,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C112698675","wikidata":"https://www.wikidata.org/wiki/Q37038","display_name":"Advertising","level":1,"score":0.0},{"id":"https://openalex.org/C23572009","wikidata":"https://www.wikidata.org/wiki/Q964981","display_name":"Equivalent circuit","level":3,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/0165-6074(86)90076-1","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(86)90076-1","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W2354841","https://openalex.org/W29930663","https://openalex.org/W106843714","https://openalex.org/W123416192","https://openalex.org/W1666015432","https://openalex.org/W1967575124","https://openalex.org/W1973116517","https://openalex.org/W2002330922","https://openalex.org/W2017803597","https://openalex.org/W2116580823","https://openalex.org/W2145637071","https://openalex.org/W2988586520","https://openalex.org/W4247009844","https://openalex.org/W6601257785","https://openalex.org/W6604312146","https://openalex.org/W6605023373","https://openalex.org/W6643638186","https://openalex.org/W6649701786","https://openalex.org/W6654707352","https://openalex.org/W6681652091"],"related_works":["https://openalex.org/W2357425846","https://openalex.org/W2376028644","https://openalex.org/W2595178692","https://openalex.org/W2248366743","https://openalex.org/W1964352816","https://openalex.org/W2373139370","https://openalex.org/W2043447162","https://openalex.org/W2165817382","https://openalex.org/W2376726667","https://openalex.org/W162881505"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}