{"id":"https://openalex.org/W1977413607","doi":"https://doi.org/10.1016/0165-6074(86)90056-6","title":"An approach to fault-tolerance in architectures for discrete fourier transforms","display_name":"An approach to fault-tolerance in architectures for discrete fourier transforms","publication_year":1986,"publication_date":"1986-12-01","ids":{"openalex":"https://openalex.org/W1977413607","doi":"https://doi.org/10.1016/0165-6074(86)90056-6","mag":"1977413607"},"language":"en","primary_location":{"id":"doi:10.1016/0165-6074(86)90056-6","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(86)90056-6","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5040291662","display_name":"A. Antola","orcid":null},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Anna Antola","raw_affiliation_strings":["Department of Electronics - Politecnico di Milano - Italy","Dept. of Electronics, Politecnico di Milano, ITALY"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics - Politecnico di Milano - Italy","institution_ids":["https://openalex.org/I93860229"]},{"raw_affiliation_string":"Dept. of Electronics, Politecnico di Milano, ITALY","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002433120","display_name":"R. Negrini","orcid":null},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Roberto Negrini","raw_affiliation_strings":["Department of Electronics - Politecnico di Milano - Italy","Dept. of Electronics, Politecnico di Milano, ITALY"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics - Politecnico di Milano - Italy","institution_ids":["https://openalex.org/I93860229"]},{"raw_affiliation_string":"Dept. of Electronics, Politecnico di Milano, ITALY","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5050008400","display_name":"Nello Scarabottolo","orcid":null},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Nello Scarabottolo","raw_affiliation_strings":["Department of Electronics - Politecnico di Milano - Italy","Dept. of Electronics, Politecnico di Milano, ITALY"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics - Politecnico di Milano - Italy","institution_ids":["https://openalex.org/I93860229"]},{"raw_affiliation_string":"Dept. of Electronics, Politecnico di Milano, ITALY","institution_ids":["https://openalex.org/I93860229"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.9448,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.77475118,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"18","issue":"1-5","first_page":"275","last_page":"288"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9968000054359436,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9968000054359436,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9927999973297119,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10876","display_name":"Fault Detection and Control Systems","score":0.9891999959945679,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.9199062585830688},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8427255153656006},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.7371346950531006},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.675025463104248},{"id":"https://openalex.org/keywords/discrete-fourier-transform","display_name":"Discrete Fourier transform (general)","score":0.6529881954193115},{"id":"https://openalex.org/keywords/fourier-transform","display_name":"Fourier transform","score":0.6411202549934387},{"id":"https://openalex.org/keywords/fast-fourier-transform","display_name":"Fast Fourier transform","score":0.574970543384552},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5468903183937073},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.46764490008354187},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.44715145230293274},{"id":"https://openalex.org/keywords/computational-science","display_name":"Computational science","score":0.3962557017803192},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.25647324323654175},{"id":"https://openalex.org/keywords/fractional-fourier-transform","display_name":"Fractional Fourier transform","score":0.2421574890613556},{"id":"https://openalex.org/keywords/fourier-analysis","display_name":"Fourier analysis","score":0.21845227479934692},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.21445998549461365},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.07861632108688354}],"concepts":[{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.9199062585830688},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8427255153656006},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.7371346950531006},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.675025463104248},{"id":"https://openalex.org/C57733114","wikidata":"https://www.wikidata.org/wiki/Q1006032","display_name":"Discrete Fourier transform (general)","level":5,"score":0.6529881954193115},{"id":"https://openalex.org/C102519508","wikidata":"https://www.wikidata.org/wiki/Q6520159","display_name":"Fourier transform","level":2,"score":0.6411202549934387},{"id":"https://openalex.org/C75172450","wikidata":"https://www.wikidata.org/wiki/Q623950","display_name":"Fast Fourier transform","level":2,"score":0.574970543384552},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5468903183937073},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.46764490008354187},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.44715145230293274},{"id":"https://openalex.org/C459310","wikidata":"https://www.wikidata.org/wiki/Q117801","display_name":"Computational science","level":1,"score":0.3962557017803192},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.25647324323654175},{"id":"https://openalex.org/C76563020","wikidata":"https://www.wikidata.org/wiki/Q4817582","display_name":"Fractional Fourier transform","level":4,"score":0.2421574890613556},{"id":"https://openalex.org/C203024314","wikidata":"https://www.wikidata.org/wiki/Q1365258","display_name":"Fourier analysis","level":3,"score":0.21845227479934692},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.21445998549461365},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.07861632108688354},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1016/0165-6074(86)90056-6","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(86)90056-6","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"},{"id":"pmh:oai:re.public.polimi.it:11311/645535","is_oa":false,"landing_page_url":"http://hdl.handle.net/11311/645535","pdf_url":null,"source":{"id":"https://openalex.org/S4306400312","display_name":"Virtual Community of Pathological Anatomy (University of Castilla La Mancha)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I79189158","host_organization_name":"University of Castilla-La Mancha","host_organization_lineage":["https://openalex.org/I79189158"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":31,"referenced_works":["https://openalex.org/W590240499","https://openalex.org/W1546944769","https://openalex.org/W1572474464","https://openalex.org/W1578458555","https://openalex.org/W1900969659","https://openalex.org/W1986567912","https://openalex.org/W2000253898","https://openalex.org/W2007604360","https://openalex.org/W2015820520","https://openalex.org/W2023259779","https://openalex.org/W2040534442","https://openalex.org/W2049872805","https://openalex.org/W2073827186","https://openalex.org/W2083693541","https://openalex.org/W2084287660","https://openalex.org/W2134146185","https://openalex.org/W2138245082","https://openalex.org/W2158612529","https://openalex.org/W2161487138","https://openalex.org/W2172119162","https://openalex.org/W2970210925","https://openalex.org/W4251100635","https://openalex.org/W6632831659","https://openalex.org/W6650511446","https://openalex.org/W6652519600","https://openalex.org/W6660355320","https://openalex.org/W6671384848","https://openalex.org/W6679910025","https://openalex.org/W6680419662","https://openalex.org/W6683519785","https://openalex.org/W6683964449"],"related_works":["https://openalex.org/W2165091308","https://openalex.org/W2130594209","https://openalex.org/W1950809481","https://openalex.org/W2085988155","https://openalex.org/W2154006536","https://openalex.org/W2158463942","https://openalex.org/W2348800014","https://openalex.org/W2365391860","https://openalex.org/W1820187807","https://openalex.org/W4362564158"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
