{"id":"https://openalex.org/W2094155798","doi":"https://doi.org/10.1016/0165-6074(84)90002-4","title":"Design of switches for self-reconfiguring VLSI array structures","display_name":"Design of switches for self-reconfiguring VLSI array structures","publication_year":1984,"publication_date":"1984-10-01","ids":{"openalex":"https://openalex.org/W2094155798","doi":"https://doi.org/10.1016/0165-6074(84)90002-4","mag":"2094155798"},"language":"en","primary_location":{"id":"doi:10.1016/0165-6074(84)90002-4","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(84)90002-4","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100872140","display_name":"G. Gentile","orcid":null},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"G Gentile","raw_affiliation_strings":["Department of Electronics, Politecnico di Milano, Milano, Italy#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics, Politecnico di Milano, Milano, Italy#TAB#","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111135579","display_name":"M.G. Sami","orcid":"https://orcid.org/0009-0002-3623-3888"},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"M.G Sami","raw_affiliation_strings":["Department of Electronics, Politecnico di Milano, Milano, Italy#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics, Politecnico di Milano, Milano, Italy#TAB#","institution_ids":["https://openalex.org/I93860229"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5078642977","display_name":"M Terzoli","orcid":null},"institutions":[{"id":"https://openalex.org/I93860229","display_name":"Politecnico di Milano","ror":"https://ror.org/01nffqt88","country_code":"IT","type":"education","lineage":["https://openalex.org/I93860229"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"M Terzoli","raw_affiliation_strings":["Department of Electronics, Politecnico di Milano, Milano, Italy#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics, Politecnico di Milano, Milano, Italy#TAB#","institution_ids":["https://openalex.org/I93860229"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.2521,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.83136483,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"14","issue":"3-4","first_page":"99","last_page":"108"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8948183655738831},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.8105449676513672},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5493906140327454},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.387539803981781},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3792939782142639}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8948183655738831},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.8105449676513672},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5493906140327454},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.387539803981781},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3792939782142639}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/0165-6074(84)90002-4","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(84)90002-4","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1538383862","https://openalex.org/W1666015432","https://openalex.org/W1967575124","https://openalex.org/W2017369466","https://openalex.org/W2046826146","https://openalex.org/W2071058948","https://openalex.org/W2085319748","https://openalex.org/W2121881146","https://openalex.org/W6631990025","https://openalex.org/W6678071927"],"related_works":["https://openalex.org/W2899084033","https://openalex.org/W2748952813","https://openalex.org/W4283025278","https://openalex.org/W2390279801","https://openalex.org/W1617740971","https://openalex.org/W2134640991","https://openalex.org/W3027318491","https://openalex.org/W1607753725","https://openalex.org/W1979789826","https://openalex.org/W1986774039"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}