{"id":"https://openalex.org/W2023617388","doi":"https://doi.org/10.1016/0165-6074(83)90089-3","title":"A high level language architecture: Bit-slice-based processor and associated system software","display_name":"A high level language architecture: Bit-slice-based processor and associated system software","publication_year":1983,"publication_date":"1983-10-01","ids":{"openalex":"https://openalex.org/W2023617388","doi":"https://doi.org/10.1016/0165-6074(83)90089-3","mag":"2023617388"},"language":"en","primary_location":{"id":"doi:10.1016/0165-6074(83)90089-3","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(83)90089-3","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5030033846","display_name":"Veljko Milutinovi\u0107","orcid":"https://orcid.org/0000-0002-9380-5232"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"V. Milutinovi\u0107","raw_affiliation_strings":["School of Electrical Engineering, Purdue University, West Lafayette, Indiana 47907, U. S. A"],"affiliations":[{"raw_affiliation_string":"School of Electrical Engineering, Purdue University, West Lafayette, Indiana 47907, U. S. A","institution_ids":["https://openalex.org/I219193219"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5030033846"],"corresponding_institution_ids":["https://openalex.org/I219193219"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.21827745,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"12","issue":"3-4","first_page":"143","last_page":"151"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9944000244140625,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9532999992370605,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.9264678955078125},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.6197803020477295},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.5177013874053955},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.48767101764678955},{"id":"https://openalex.org/keywords/bit","display_name":"Bit (key)","score":0.45924925804138184},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4543073773384094},{"id":"https://openalex.org/keywords/32-bit","display_name":"32-bit","score":0.4104146957397461},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.37365350127220154},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.36491259932518005},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3456583619117737},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.08373957872390747}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.9264678955078125},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.6197803020477295},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.5177013874053955},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.48767101764678955},{"id":"https://openalex.org/C117011727","wikidata":"https://www.wikidata.org/wiki/Q1278488","display_name":"Bit (key)","level":2,"score":0.45924925804138184},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4543073773384094},{"id":"https://openalex.org/C75695347","wikidata":"https://www.wikidata.org/wiki/Q225147","display_name":"32-bit","level":2,"score":0.4104146957397461},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.37365350127220154},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.36491259932518005},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3456583619117737},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.08373957872390747},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/0165-6074(83)90089-3","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(83)90089-3","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W48631345","https://openalex.org/W135559100","https://openalex.org/W1984803709","https://openalex.org/W2034358743","https://openalex.org/W2057736521","https://openalex.org/W2079709098","https://openalex.org/W2092492242","https://openalex.org/W2136439370","https://openalex.org/W4293583580","https://openalex.org/W6680046124"],"related_works":["https://openalex.org/W2011273053","https://openalex.org/W4232053994","https://openalex.org/W975020229","https://openalex.org/W1902169700","https://openalex.org/W4241265697","https://openalex.org/W4211092986","https://openalex.org/W2295312786","https://openalex.org/W3079574035","https://openalex.org/W2472892553","https://openalex.org/W2168022203"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}