{"id":"https://openalex.org/W2035814558","doi":"https://doi.org/10.1016/0165-6074(82)90095-3","title":"Logic design strategies","display_name":"Logic design strategies","publication_year":1982,"publication_date":"1982-09-01","ids":{"openalex":"https://openalex.org/W2035814558","doi":"https://doi.org/10.1016/0165-6074(82)90095-3","mag":"2035814558"},"language":"en","primary_location":{"id":"doi:10.1016/0165-6074(82)90095-3","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(82)90095-3","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5037909244","display_name":"Hans Martin Lipp","orcid":null},"institutions":[{"id":"https://openalex.org/I102335020","display_name":"Karlsruhe Institute of Technology","ror":"https://ror.org/04t3en479","country_code":"DE","type":"education","lineage":["https://openalex.org/I102335020","https://openalex.org/I1305996414"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Hans Martin Lipp","raw_affiliation_strings":["Institut f\u00fcr Nachrichtenverarbeitung, Universit\u00e4t Karlsruhe, Kaiserstrasse 12, 7500 Karlsruhe 1, Federal Republic of Germany"],"affiliations":[{"raw_affiliation_string":"Institut f\u00fcr Nachrichtenverarbeitung, Universit\u00e4t Karlsruhe, Kaiserstrasse 12, 7500 Karlsruhe 1, Federal Republic of Germany","institution_ids":["https://openalex.org/I102335020"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5037909244"],"corresponding_institution_ids":["https://openalex.org/I102335020"],"apc_list":null,"apc_paid":null,"fwci":1.0906,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.7707515,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"10","issue":"2-3","first_page":"153","last_page":"162"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8192228674888611},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5006852149963379},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4974537193775177},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.4727631211280823},{"id":"https://openalex.org/keywords/variety","display_name":"Variety (cybernetics)","score":0.4613931179046631},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.44836705923080444},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.44111642241477966},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.43390369415283203},{"id":"https://openalex.org/keywords/quality","display_name":"Quality (philosophy)","score":0.4177534580230713},{"id":"https://openalex.org/keywords/systems-engineering","display_name":"Systems engineering","score":0.3610580265522003},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.3345206379890442},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3310908079147339},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.33066409826278687},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.2640090882778168},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.24892640113830566},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2214389443397522},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.1809062659740448},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.12775066494941711},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.113340824842453},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.08824896812438965},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.0763280987739563}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8192228674888611},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5006852149963379},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4974537193775177},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.4727631211280823},{"id":"https://openalex.org/C136197465","wikidata":"https://www.wikidata.org/wiki/Q1729295","display_name":"Variety (cybernetics)","level":2,"score":0.4613931179046631},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.44836705923080444},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.44111642241477966},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.43390369415283203},{"id":"https://openalex.org/C2779530757","wikidata":"https://www.wikidata.org/wiki/Q1207505","display_name":"Quality (philosophy)","level":2,"score":0.4177534580230713},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.3610580265522003},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.3345206379890442},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3310908079147339},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.33066409826278687},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.2640090882778168},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.24892640113830566},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2214389443397522},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.1809062659740448},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.12775066494941711},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.113340824842453},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.08824896812438965},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0763280987739563},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/0165-6074(82)90095-3","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0165-6074(82)90095-3","pdf_url":null,"source":{"id":"https://openalex.org/S92214702","display_name":"Microprocessing and Microprogramming","issn_l":"0165-6074","issn":["0165-6074","1878-7061"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessing and Microprogramming","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.5699999928474426,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W1666015432","https://openalex.org/W1967575124","https://openalex.org/W2028749987","https://openalex.org/W2037491793","https://openalex.org/W2163205571","https://openalex.org/W2167554968","https://openalex.org/W4212911697","https://openalex.org/W6657338929"],"related_works":["https://openalex.org/W2132668926","https://openalex.org/W2163105316","https://openalex.org/W2186482337","https://openalex.org/W2113738958","https://openalex.org/W2547355295","https://openalex.org/W2159053194","https://openalex.org/W2059199163","https://openalex.org/W2121036163","https://openalex.org/W2102547348","https://openalex.org/W4247095439"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}