{"id":"https://openalex.org/W2027396466","doi":"https://doi.org/10.1016/0141-9331(96)84161-5","title":"Implementation of a RISC microprocessor for programmable logic controllers","display_name":"Implementation of a RISC microprocessor for programmable logic controllers","publication_year":1995,"publication_date":"1995-12-01","ids":{"openalex":"https://openalex.org/W2027396466","doi":"https://doi.org/10.1016/0141-9331(96)84161-5","mag":"2027396466"},"language":"en","primary_location":{"id":"doi:10.1016/0141-9331(96)84161-5","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0141-9331(96)84161-5","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5070107376","display_name":"Gab Seon Rho","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Gab Seon Rho","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031690955","display_name":"Kyeonghoon Koo","orcid":null},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Kyeong-hoon Koo","raw_affiliation_strings":["Department of Control and Instrumentation Engineering, Seoul National University, Shinlim-dong San56-1, Kwanak-gu, Seoul, 151-742, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Control and Instrumentation Engineering, Seoul National University, Shinlim-dong San56-1, Kwanak-gu, Seoul, 151-742, Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012573428","display_name":"Naehyuck Chang","orcid":"https://orcid.org/0000-0003-3288-8174"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Naehyuck Chang","raw_affiliation_strings":["Department of Control and Instrumentation Engineering, Seoul National University, Shinlim-dong San56-1, Kwanak-gu, Seoul, 151-742, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Control and Instrumentation Engineering, Seoul National University, Shinlim-dong San56-1, Kwanak-gu, Seoul, 151-742, Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100618955","display_name":"Jaehyun Park","orcid":"https://orcid.org/0000-0002-2276-4998"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jaehyun Park","raw_affiliation_strings":["Department of Control and Instrumentation Engineering, Seoul National University, Shinlim-dong San56-1, Kwanak-gu, Seoul, 151-742, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Control and Instrumentation Engineering, Seoul National University, Shinlim-dong San56-1, Kwanak-gu, Seoul, 151-742, Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006560804","display_name":"Yeong-gi Kim","orcid":null},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Yeong-gi Kim","raw_affiliation_strings":["Samsung Aerospace Industries, Ltd, Suwon, PO Box 111, Kyungki-do, 441-600, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Samsung Aerospace Industries, Ltd, Suwon, PO Box 111, Kyungki-do, 441-600, Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100804223","display_name":"Wook Hyun \u041awon","orcid":"https://orcid.org/0009-0002-9073-9708"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Wook Hyun Kwon","raw_affiliation_strings":["Department of Control and Instrumentation Engineering, Seoul National University, Shinlim-dong San56-1, Kwanak-gu, Seoul, 151-742, Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Control and Instrumentation Engineering, Seoul National University, Shinlim-dong San56-1, Kwanak-gu, Seoul, 151-742, Korea","institution_ids":["https://openalex.org/I139264467"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5070107376"],"corresponding_institution_ids":[],"apc_list":{"value":2200,"currency":"USD","value_usd":2200},"apc_paid":null,"fwci":0.7745,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.74803363,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"19","issue":"10","first_page":"599","last_page":"608"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8728148937225342},{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"Reduced instruction set computing","score":0.8127826452255249},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.7258803844451904},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.7115514874458313},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.6245256662368774},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.6128895282745361},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.6042091846466064},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.6028568744659424},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5698785781860352},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.48750755190849304},{"id":"https://openalex.org/keywords/addressing-mode","display_name":"Addressing mode","score":0.4619285464286804},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.4281063675880432},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3806321620941162},{"id":"https://openalex.org/keywords/instructions-per-cycle","display_name":"Instructions per cycle","score":0.31960147619247437},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.2765018343925476},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.21673709154129028},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.16293209791183472},{"id":"https://openalex.org/keywords/central-processing-unit","display_name":"Central processing unit","score":0.11323904991149902}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8728148937225342},{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.8127826452255249},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.7258803844451904},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.7115514874458313},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.6245256662368774},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.6128895282745361},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.6042091846466064},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.6028568744659424},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5698785781860352},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.48750755190849304},{"id":"https://openalex.org/C16901944","wikidata":"https://www.wikidata.org/wiki/Q367183","display_name":"Addressing mode","level":4,"score":0.4619285464286804},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.4281063675880432},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3806321620941162},{"id":"https://openalex.org/C156972235","wikidata":"https://www.wikidata.org/wiki/Q1443434","display_name":"Instructions per cycle","level":3,"score":0.31960147619247437},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.2765018343925476},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.21673709154129028},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.16293209791183472},{"id":"https://openalex.org/C49154492","wikidata":"https://www.wikidata.org/wiki/Q5300","display_name":"Central processing unit","level":2,"score":0.11323904991149902}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/0141-9331(96)84161-5","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0141-9331(96)84161-5","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W145288397","https://openalex.org/W280822744","https://openalex.org/W1555915743","https://openalex.org/W1999069884","https://openalex.org/W2008203891","https://openalex.org/W2058198174","https://openalex.org/W2069295582","https://openalex.org/W2070554607","https://openalex.org/W2111441521","https://openalex.org/W2128502296","https://openalex.org/W2187446049","https://openalex.org/W2540612509","https://openalex.org/W6652010069","https://openalex.org/W6679093688","https://openalex.org/W6728630781","https://openalex.org/W6728863182"],"related_works":["https://openalex.org/W2171175484","https://openalex.org/W2047885859","https://openalex.org/W2036206036","https://openalex.org/W4387540511","https://openalex.org/W3167587462","https://openalex.org/W2578294022","https://openalex.org/W2182235929","https://openalex.org/W2532121209","https://openalex.org/W2993179931","https://openalex.org/W2092187323"],"abstract_inverted_index":null,"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
