{"id":"https://openalex.org/W293928551","doi":"https://doi.org/10.1016/0141-9331(94)90040-x","title":"Structured Logic Design with VHDL","display_name":"Structured Logic Design with VHDL","publication_year":1994,"publication_date":"1994-12-01","ids":{"openalex":"https://openalex.org/W293928551","doi":"https://doi.org/10.1016/0141-9331(94)90040-x","mag":"293928551"},"language":"en","primary_location":{"id":"doi:10.1016/0141-9331(94)90040-x","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0141-9331(94)90040-x","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5112277692","display_name":"Marian Adamski","orcid":null},"institutions":[{"id":"https://openalex.org/I99682543","display_name":"University of Minho","ror":"https://ror.org/037wpkx04","country_code":"PT","type":"education","lineage":["https://openalex.org/I99682543"]}],"countries":["PT"],"is_corresponding":true,"raw_author_name":"Marian Adamski","raw_affiliation_strings":["Universidade do Minho, Braga, Guimaraes, Portugal"],"affiliations":[{"raw_affiliation_string":"Universidade do Minho, Braga, Guimaraes, Portugal","institution_ids":["https://openalex.org/I99682543"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5112277692"],"corresponding_institution_ids":["https://openalex.org/I99682543"],"apc_list":{"value":2200,"currency":"USD","value_usd":2200},"apc_paid":null,"fwci":0.3975,"has_fulltext":false,"cited_by_count":28,"citation_normalized_percentile":{"value":0.62394604,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"18","issue":"10","first_page":"621","last_page":"622"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9833999872207642,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9833999872207642,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9696000218391418,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9577999711036682,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.9179048538208008},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.7404839992523193},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4782378077507019},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.45223918557167053},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4104897081851959},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3222595453262329},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.32034024596214294},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.21614304184913635},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.1836262047290802},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.16006988286972046}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.9179048538208008},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.7404839992523193},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4782378077507019},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.45223918557167053},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4104897081851959},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3222595453262329},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.32034024596214294},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.21614304184913635},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.1836262047290802},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.16006988286972046}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/0141-9331(94)90040-x","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0141-9331(94)90040-x","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W78782492","https://openalex.org/W2122949436","https://openalex.org/W1043594576","https://openalex.org/W190963477","https://openalex.org/W2077870657","https://openalex.org/W2115658098","https://openalex.org/W2137740905","https://openalex.org/W1555025092","https://openalex.org/W2332122163","https://openalex.org/W2363829830"],"abstract_inverted_index":null,"counts_by_year":[{"year":2024,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
