{"id":"https://openalex.org/W1551456050","doi":"https://doi.org/10.1016/0141-9331(93)90021-x","title":"Automated synthesis of asynchronous interface circuits","display_name":"Automated synthesis of asynchronous interface circuits","publication_year":1993,"publication_date":"1993-05-01","ids":{"openalex":"https://openalex.org/W1551456050","doi":"https://doi.org/10.1016/0141-9331(93)90021-x","mag":"1551456050"},"language":"en","primary_location":{"id":"doi:10.1016/0141-9331(93)90021-x","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0141-9331(93)90021-x","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5050365912","display_name":"Luciano Lavagno","orcid":"https://orcid.org/0000-0002-9762-6522"},"institutions":[{"id":"https://openalex.org/I95457486","display_name":"University of California, Berkeley","ror":"https://ror.org/01an7q238","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"L Lavagno","raw_affiliation_strings":["[Dept. of EECS, University of California, Berkeley, USA]"],"affiliations":[{"raw_affiliation_string":"[Dept. of EECS, University of California, Berkeley, USA]","institution_ids":["https://openalex.org/I95457486"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5088660554","display_name":"Alberto Sangiovanni\u2010Vincentelli","orcid":"https://orcid.org/0000-0003-1298-8389"},"institutions":[{"id":"https://openalex.org/I95457486","display_name":"University of California, Berkeley","ror":"https://ror.org/01an7q238","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"A Sangiovanni-Vincentelli","raw_affiliation_strings":["[Dept. of EECS, University of California, Berkeley, USA]"],"affiliations":[{"raw_affiliation_string":"[Dept. of EECS, University of California, Berkeley, USA]","institution_ids":["https://openalex.org/I95457486"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5050365912"],"corresponding_institution_ids":["https://openalex.org/I95457486"],"apc_list":{"value":2200,"currency":"USD","value_usd":2200},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.08352668,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"17","issue":"4","first_page":"232","last_page":"242"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.8279774785041809},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7174532413482666},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.7060238122940063},{"id":"https://openalex.org/keywords/hazard","display_name":"Hazard","score":0.6930505037307739},{"id":"https://openalex.org/keywords/asynchronous-circuit","display_name":"Asynchronous circuit","score":0.5646998882293701},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.560283899307251},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16919326782226562},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.1591288447380066},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.15096983313560486},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.12498268485069275},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.10696747899055481},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.0605606734752655}],"concepts":[{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.8279774785041809},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7174532413482666},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.7060238122940063},{"id":"https://openalex.org/C49261128","wikidata":"https://www.wikidata.org/wiki/Q1132455","display_name":"Hazard","level":2,"score":0.6930505037307739},{"id":"https://openalex.org/C87695204","wikidata":"https://www.wikidata.org/wiki/Q629971","display_name":"Asynchronous circuit","level":5,"score":0.5646998882293701},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.560283899307251},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16919326782226562},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.1591288447380066},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.15096983313560486},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.12498268485069275},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.10696747899055481},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0605606734752655},{"id":"https://openalex.org/C178790620","wikidata":"https://www.wikidata.org/wiki/Q11351","display_name":"Organic chemistry","level":1,"score":0.0},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1016/0141-9331(93)90021-x","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0141-9331(93)90021-x","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"},{"id":"mag:1551456050","is_oa":false,"landing_page_url":"https://dblp.uni-trier.de/db/conf/ifip10-5/ifip10-5-1993.html#LavagnoS93","pdf_url":null,"source":null,"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":null,"raw_source_name":null,"raw_type":null}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W1795974572","https://openalex.org/W2005130273","https://openalex.org/W2033045135","https://openalex.org/W2089904802","https://openalex.org/W2111125619","https://openalex.org/W2111989077","https://openalex.org/W2126221638","https://openalex.org/W3177082579","https://openalex.org/W4231905827","https://openalex.org/W6605271731","https://openalex.org/W6629326351","https://openalex.org/W6630000823","https://openalex.org/W6630623413","https://openalex.org/W6633160452","https://openalex.org/W6633282629","https://openalex.org/W6633768105","https://openalex.org/W6639378087","https://openalex.org/W6649340350","https://openalex.org/W6673658301","https://openalex.org/W6674714515","https://openalex.org/W6678013405","https://openalex.org/W6680133324","https://openalex.org/W6680563694","https://openalex.org/W6680686360","https://openalex.org/W6682029675","https://openalex.org/W6682838384","https://openalex.org/W7062389935"],"related_works":["https://openalex.org/W1996381892","https://openalex.org/W2154185188","https://openalex.org/W3151319686","https://openalex.org/W2151254525","https://openalex.org/W2153364763","https://openalex.org/W2135765048","https://openalex.org/W2163693853","https://openalex.org/W2140792504","https://openalex.org/W2834147503","https://openalex.org/W1482079447","https://openalex.org/W2530777221","https://openalex.org/W2103699587","https://openalex.org/W2796268997","https://openalex.org/W3150838188","https://openalex.org/W2187244311","https://openalex.org/W2003598123","https://openalex.org/W2146978514","https://openalex.org/W2987286388","https://openalex.org/W2579673976","https://openalex.org/W2106929737"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
