{"id":"https://openalex.org/W2152921513","doi":"https://doi.org/10.1016/0141-9331(92)90082-5","title":"A data path approach for testing microprocessors with a fault bound: the MC68000 case","display_name":"A data path approach for testing microprocessors with a fault bound: the MC68000 case","publication_year":1992,"publication_date":"1992-01-01","ids":{"openalex":"https://openalex.org/W2152921513","doi":"https://doi.org/10.1016/0141-9331(92)90082-5","mag":"2152921513"},"language":"en","primary_location":{"id":"doi:10.1016/0141-9331(92)90082-5","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0141-9331(92)90082-5","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5050172810","display_name":"Jos\u00e9 Mar\u00eda Salinas","orcid":"https://orcid.org/0000-0003-2520-1178"},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J Salinas","raw_affiliation_strings":["Department of Computer Science, Texas A&M University, College Station TX 77843, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Texas A&M University, College Station TX 77843, USA","institution_ids":["https://openalex.org/I91045830"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5001979328","display_name":"Fabrizio Lombardi","orcid":"https://orcid.org/0000-0003-3152-3245"},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"F Lombardi","raw_affiliation_strings":["Department of Computer Science, Texas A&M University, College Station TX 77843, USA"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Texas A&M University, College Station TX 77843, USA","institution_ids":["https://openalex.org/I91045830"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5001979328"],"corresponding_institution_ids":["https://openalex.org/I91045830"],"apc_list":{"value":2200,"currency":"USD","value_usd":2200},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.23424301,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"16","issue":"10","first_page":"529","last_page":"539"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8127985000610352},{"id":"https://openalex.org/keywords/controllability","display_name":"Controllability","score":0.7345158457756042},{"id":"https://openalex.org/keywords/observability","display_name":"Observability","score":0.6802411079406738},{"id":"https://openalex.org/keywords/testability","display_name":"Testability","score":0.6374728083610535},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.6111242771148682},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.5977246165275574},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.5821428894996643},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.5450456738471985},{"id":"https://openalex.org/keywords/functional-testing","display_name":"Functional testing","score":0.48926326632499695},{"id":"https://openalex.org/keywords/integration-testing","display_name":"Integration testing","score":0.43838319182395935},{"id":"https://openalex.org/keywords/test-data","display_name":"Test data","score":0.4303820729255676},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.40411585569381714},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.33937782049179077},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3265698254108429},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.28529590368270874},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.27731871604919434},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.08741810917854309},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.08615672588348389}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8127985000610352},{"id":"https://openalex.org/C48209547","wikidata":"https://www.wikidata.org/wiki/Q1331104","display_name":"Controllability","level":2,"score":0.7345158457756042},{"id":"https://openalex.org/C36299963","wikidata":"https://www.wikidata.org/wiki/Q1369844","display_name":"Observability","level":2,"score":0.6802411079406738},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.6374728083610535},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.6111242771148682},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.5977246165275574},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.5821428894996643},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.5450456738471985},{"id":"https://openalex.org/C80823478","wikidata":"https://www.wikidata.org/wiki/Q4493432","display_name":"Functional testing","level":3,"score":0.48926326632499695},{"id":"https://openalex.org/C107683887","wikidata":"https://www.wikidata.org/wiki/Q782466","display_name":"Integration testing","level":3,"score":0.43838319182395935},{"id":"https://openalex.org/C16910744","wikidata":"https://www.wikidata.org/wiki/Q7705759","display_name":"Test data","level":2,"score":0.4303820729255676},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.40411585569381714},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.33937782049179077},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3265698254108429},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.28529590368270874},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.27731871604919434},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.08741810917854309},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.08615672588348389},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C28826006","wikidata":"https://www.wikidata.org/wiki/Q33521","display_name":"Applied mathematics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/0141-9331(92)90082-5","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0141-9331(92)90082-5","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6200000047683716,"display_name":"Reduced inequalities","id":"https://metadata.un.org/sdg/10"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":26,"referenced_works":["https://openalex.org/W103638709","https://openalex.org/W182584517","https://openalex.org/W239283595","https://openalex.org/W1482488804","https://openalex.org/W1520460310","https://openalex.org/W1823755974","https://openalex.org/W1972576389","https://openalex.org/W1983209586","https://openalex.org/W2034476614","https://openalex.org/W2043949919","https://openalex.org/W2077945076","https://openalex.org/W2078888330","https://openalex.org/W2089805567","https://openalex.org/W2098076619","https://openalex.org/W2131021655","https://openalex.org/W2137128459","https://openalex.org/W2161766933","https://openalex.org/W2736403507","https://openalex.org/W2972069330","https://openalex.org/W4205169627","https://openalex.org/W6604212687","https://openalex.org/W6607368665","https://openalex.org/W6685627423","https://openalex.org/W6741557617","https://openalex.org/W6767994252","https://openalex.org/W7002347421"],"related_works":["https://openalex.org/W2947266479","https://openalex.org/W2369589212","https://openalex.org/W2107525390","https://openalex.org/W2157191248","https://openalex.org/W2151694129","https://openalex.org/W2157212570","https://openalex.org/W2169602749","https://openalex.org/W1579528621","https://openalex.org/W2141620082","https://openalex.org/W2754317536"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}