{"id":"https://openalex.org/W2084997371","doi":"https://doi.org/10.1016/0141-9331(90)90121-b","title":"Reprogrammable gate arrays for hardware accelerated IC design verification","display_name":"Reprogrammable gate arrays for hardware accelerated IC design verification","publication_year":1990,"publication_date":"1990-06-01","ids":{"openalex":"https://openalex.org/W2084997371","doi":"https://doi.org/10.1016/0141-9331(90)90121-b","mag":"2084997371"},"language":"en","primary_location":{"id":"doi:10.1016/0141-9331(90)90121-b","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0141-9331(90)90121-b","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5027206129","display_name":"J.A. Dickson","orcid":null},"institutions":[{"id":"https://openalex.org/I46247651","display_name":"University of Manitoba","ror":"https://ror.org/02gfys938","country_code":"CA","type":"education","lineage":["https://openalex.org/I46247651"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Jeffrey A Dickson","raw_affiliation_strings":["VLSI Research Laboratory, Department of Electrical Engineering, University of Manitoba, Winnipeg, Manitoba, Canada R3T 2N2","University of Manitoba, Winnipeg, Man., Canada"],"affiliations":[{"raw_affiliation_string":"VLSI Research Laboratory, Department of Electrical Engineering, University of Manitoba, Winnipeg, Manitoba, Canada R3T 2N2","institution_ids":["https://openalex.org/I46247651"]},{"raw_affiliation_string":"University of Manitoba, Winnipeg, Man., Canada","institution_ids":["https://openalex.org/I46247651"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101596344","display_name":"Bing Liu","orcid":"https://orcid.org/0000-0001-9206-8608"},"institutions":[{"id":"https://openalex.org/I46247651","display_name":"University of Manitoba","ror":"https://ror.org/02gfys938","country_code":"CA","type":"education","lineage":["https://openalex.org/I46247651"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Bing Liu","raw_affiliation_strings":["VLSI Research Laboratory, Department of Electrical Engineering, University of Manitoba, Winnipeg, Manitoba, Canada R3T 2N2","University of Manitoba, Winnipeg, Man., Canada"],"affiliations":[{"raw_affiliation_string":"VLSI Research Laboratory, Department of Electrical Engineering, University of Manitoba, Winnipeg, Manitoba, Canada R3T 2N2","institution_ids":["https://openalex.org/I46247651"]},{"raw_affiliation_string":"University of Manitoba, Winnipeg, Man., Canada","institution_ids":["https://openalex.org/I46247651"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103519695","display_name":"Alan W Ptak","orcid":null},"institutions":[{"id":"https://openalex.org/I46247651","display_name":"University of Manitoba","ror":"https://ror.org/02gfys938","country_code":"CA","type":"education","lineage":["https://openalex.org/I46247651"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Alan W Ptak","raw_affiliation_strings":["VLSI Research Laboratory, Department of Electrical Engineering, University of Manitoba, Winnipeg, Manitoba, Canada R3T 2N2","University of Manitoba, Winnipeg, Man., Canada"],"affiliations":[{"raw_affiliation_string":"VLSI Research Laboratory, Department of Electrical Engineering, University of Manitoba, Winnipeg, Manitoba, Canada R3T 2N2","institution_ids":["https://openalex.org/I46247651"]},{"raw_affiliation_string":"University of Manitoba, Winnipeg, Man., Canada","institution_ids":["https://openalex.org/I46247651"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5002826945","display_name":"R.D. McLeod","orcid":"https://orcid.org/0000-0002-3671-5097"},"institutions":[{"id":"https://openalex.org/I46247651","display_name":"University of Manitoba","ror":"https://ror.org/02gfys938","country_code":"CA","type":"education","lineage":["https://openalex.org/I46247651"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Robert D McLeod","raw_affiliation_strings":["VLSI Research Laboratory, Department of Electrical Engineering, University of Manitoba, Winnipeg, Manitoba, Canada R3T 2N2"],"affiliations":[{"raw_affiliation_string":"VLSI Research Laboratory, Department of Electrical Engineering, University of Manitoba, Winnipeg, Manitoba, Canada R3T 2N2","institution_ids":["https://openalex.org/I46247651"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5002826945"],"corresponding_institution_ids":["https://openalex.org/I46247651"],"apc_list":{"value":2200,"currency":"USD","value_usd":2200},"apc_paid":null,"fwci":0.5176,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.68921776,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"14","issue":"5","first_page":"291","last_page":"296"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.861169695854187},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7703316807746887},{"id":"https://openalex.org/keywords/breadboard","display_name":"Breadboard","score":0.7625284194946289},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.654200553894043},{"id":"https://openalex.org/keywords/schematic","display_name":"Schematic","score":0.6054822206497192},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5390467047691345},{"id":"https://openalex.org/keywords/logic-block","display_name":"Logic block","score":0.5162332057952881},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.49531617760658264},{"id":"https://openalex.org/keywords/gate-array","display_name":"Gate array","score":0.4594385027885437},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.4077962636947632},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.35450008511543274},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.14326879382133484},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09831306338310242}],"concepts":[{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.861169695854187},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7703316807746887},{"id":"https://openalex.org/C14116294","wikidata":"https://www.wikidata.org/wiki/Q174334","display_name":"Breadboard","level":2,"score":0.7625284194946289},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.654200553894043},{"id":"https://openalex.org/C192328126","wikidata":"https://www.wikidata.org/wiki/Q4514647","display_name":"Schematic","level":2,"score":0.6054822206497192},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5390467047691345},{"id":"https://openalex.org/C2778325283","wikidata":"https://www.wikidata.org/wiki/Q1125244","display_name":"Logic block","level":3,"score":0.5162332057952881},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.49531617760658264},{"id":"https://openalex.org/C114237110","wikidata":"https://www.wikidata.org/wiki/Q114901","display_name":"Gate array","level":3,"score":0.4594385027885437},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.4077962636947632},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.35450008511543274},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.14326879382133484},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09831306338310242}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/0141-9331(90)90121-b","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0141-9331(90)90121-b","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.5,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320310709","display_name":"CMC Microsystems","ror":"https://ror.org/03k70ea39"},{"id":"https://openalex.org/F4320334593","display_name":"Natural Sciences and Engineering Research Council of Canada","ror":"https://ror.org/01h531d29"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1996599095","https://openalex.org/W2051865740","https://openalex.org/W2097890209","https://openalex.org/W2149107969","https://openalex.org/W2162256736","https://openalex.org/W3006934335"],"related_works":["https://openalex.org/W1493975478","https://openalex.org/W1650414576","https://openalex.org/W1888803177","https://openalex.org/W2134697552","https://openalex.org/W2466518605","https://openalex.org/W2044165429","https://openalex.org/W2084997371","https://openalex.org/W2121539644","https://openalex.org/W2788600543","https://openalex.org/W4319439883"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
