{"id":"https://openalex.org/W2025201554","doi":"https://doi.org/10.1016/0141-9331(88)90163-9","title":"Impact of mapping parameters on the performance of small cache memories","display_name":"Impact of mapping parameters on the performance of small cache memories","publication_year":1988,"publication_date":"1988-05-01","ids":{"openalex":"https://openalex.org/W2025201554","doi":"https://doi.org/10.1016/0141-9331(88)90163-9","mag":"2025201554"},"language":"en","primary_location":{"id":"doi:10.1016/0141-9331(88)90163-9","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0141-9331(88)90163-9","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5109960515","display_name":"P. P. Chow","orcid":null},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"P Chow","raw_affiliation_strings":["School of Electrical Engineering, Purdue University, West Lafayette, IN 47907, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical Engineering, Purdue University, West Lafayette, IN 47907, USA","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5097962737","display_name":"T Geigel","orcid":null},"institutions":[{"id":"https://openalex.org/I2800295664","display_name":"RCA (United States)","ror":"https://ror.org/010k8n340","country_code":"US","type":"company","lineage":["https://openalex.org/I2800295664"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"T Geigel","raw_affiliation_strings":["Advanced Technology Laboratories, RCA Corporation, Moorestown, NJ 08057, USA"],"affiliations":[{"raw_affiliation_string":"Advanced Technology Laboratories, RCA Corporation, Moorestown, NJ 08057, USA","institution_ids":["https://openalex.org/I2800295664"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030033846","display_name":"Veljko Milutinovi\u0107","orcid":"https://orcid.org/0000-0002-9380-5232"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"V Milutinovi\u0107","raw_affiliation_strings":["School of Electrical Engineering, Purdue University, West Lafayette, IN 47907, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical Engineering, Purdue University, West Lafayette, IN 47907, USA","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5080304718","display_name":"J Pridmore","orcid":null},"institutions":[{"id":"https://openalex.org/I2800295664","display_name":"RCA (United States)","ror":"https://ror.org/010k8n340","country_code":"US","type":"company","lineage":["https://openalex.org/I2800295664"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J Pridmore","raw_affiliation_strings":["Advanced Technology Laboratories, RCA Corporation, Moorestown, NJ 08057, USA"],"affiliations":[{"raw_affiliation_string":"Advanced Technology Laboratories, RCA Corporation, Moorestown, NJ 08057, USA","institution_ids":["https://openalex.org/I2800295664"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5109960515"],"corresponding_institution_ids":["https://openalex.org/I219193219"],"apc_list":{"value":2200,"currency":"USD","value_usd":2200},"apc_paid":null,"fwci":0.4085,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.63571727,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"12","issue":"4","first_page":"197","last_page":"205"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8942493796348572},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.7030095458030701},{"id":"https://openalex.org/keywords/instructions-per-cycle","display_name":"Instructions per cycle","score":0.6326968669891357},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.6095527410507202},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.5634851455688477},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.5550082325935364},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5482549667358398},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5001316070556641},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.49855995178222656},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.48540887236595154},{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"Reduced instruction set computing","score":0.4796057939529419},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.4583224356174469},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4487350583076477},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.441577285528183},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.391796737909317},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.33251720666885376},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.06834366917610168},{"id":"https://openalex.org/keywords/central-processing-unit","display_name":"Central processing unit","score":0.06488630175590515}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8942493796348572},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.7030095458030701},{"id":"https://openalex.org/C156972235","wikidata":"https://www.wikidata.org/wiki/Q1443434","display_name":"Instructions per cycle","level":3,"score":0.6326968669891357},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.6095527410507202},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.5634851455688477},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.5550082325935364},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5482549667358398},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5001316070556641},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.49855995178222656},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.48540887236595154},{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.4796057939529419},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.4583224356174469},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4487350583076477},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.441577285528183},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.391796737909317},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.33251720666885376},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.06834366917610168},{"id":"https://openalex.org/C49154492","wikidata":"https://www.wikidata.org/wiki/Q5300","display_name":"Central processing unit","level":2,"score":0.06488630175590515},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/0141-9331(88)90163-9","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0141-9331(88)90163-9","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.5400000214576721,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W207171790","https://openalex.org/W1855438859","https://openalex.org/W1971424755","https://openalex.org/W1982326628","https://openalex.org/W2012932717","https://openalex.org/W2035816212","https://openalex.org/W2038319697","https://openalex.org/W2058693334","https://openalex.org/W2099372413","https://openalex.org/W2294693415","https://openalex.org/W4246197547","https://openalex.org/W4285719527","https://openalex.org/W6608375863","https://openalex.org/W6630695024","https://openalex.org/W6643182911","https://openalex.org/W6645752326","https://openalex.org/W6653569765","https://openalex.org/W6664979702","https://openalex.org/W6674968509"],"related_works":["https://openalex.org/W2164026451","https://openalex.org/W2806352516","https://openalex.org/W2148099609","https://openalex.org/W2062172248","https://openalex.org/W182515070","https://openalex.org/W4310584696","https://openalex.org/W2538644970","https://openalex.org/W2547383257","https://openalex.org/W4236915705","https://openalex.org/W4367172762"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}