{"id":"https://openalex.org/W2019018415","doi":"https://doi.org/10.1016/0141-9331(86)90117-1","title":"Hardware system for realtime signal processing software development","display_name":"Hardware system for realtime signal processing software development","publication_year":1986,"publication_date":"1986-06-01","ids":{"openalex":"https://openalex.org/W2019018415","doi":"https://doi.org/10.1016/0141-9331(86)90117-1","mag":"2019018415"},"language":"en","primary_location":{"id":"doi:10.1016/0141-9331(86)90117-1","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0141-9331(86)90117-1","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5038644718","display_name":"J. Dunlop","orcid":null},"institutions":[{"id":"https://openalex.org/I181647926","display_name":"University of Strathclyde","ror":"https://ror.org/00n3w3b69","country_code":"GB","type":"education","lineage":["https://openalex.org/I181647926"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"John Dunlop","raw_affiliation_strings":["Department of Electronic and Electrical Engineering, University of Strathclyde, Glasgow G1 1XW, UK","Department of Electronic and Electrical Engineering; University of Strathclyde; Glasgow, G1 1XW UK"],"affiliations":[{"raw_affiliation_string":"Department of Electronic and Electrical Engineering, University of Strathclyde, Glasgow G1 1XW, UK","institution_ids":["https://openalex.org/I181647926"]},{"raw_affiliation_string":"Department of Electronic and Electrical Engineering; University of Strathclyde; Glasgow, G1 1XW UK","institution_ids":["https://openalex.org/I181647926"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016951794","display_name":"Manal J. Al-Kindi","orcid":"https://orcid.org/0000-0003-0193-7463"},"institutions":[{"id":"https://openalex.org/I181647926","display_name":"University of Strathclyde","ror":"https://ror.org/00n3w3b69","country_code":"GB","type":"education","lineage":["https://openalex.org/I181647926"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Manal Al-Kindi","raw_affiliation_strings":["Department of Electronic and Electrical Engineering, University of Strathclyde, Glasgow G1 1XW, UK","Department of Electronic and Electrical Engineering; University of Strathclyde; Glasgow, G1 1XW UK"],"affiliations":[{"raw_affiliation_string":"Department of Electronic and Electrical Engineering, University of Strathclyde, Glasgow G1 1XW, UK","institution_ids":["https://openalex.org/I181647926"]},{"raw_affiliation_string":"Department of Electronic and Electrical Engineering; University of Strathclyde; Glasgow, G1 1XW UK","institution_ids":["https://openalex.org/I181647926"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5038644718"],"corresponding_institution_ids":["https://openalex.org/I181647926"],"apc_list":{"value":2200,"currency":"USD","value_usd":2200},"apc_paid":null,"fwci":1.4139,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.83289543,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"10","issue":"5","first_page":"251","last_page":"257"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9671000242233276,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9671000242233276,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12564","display_name":"Sensor Technology and Measurement Systems","score":0.9261000156402588,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12810","display_name":"Real-time simulation and control systems","score":0.9210000038146973,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8922529220581055},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.7842646837234497},{"id":"https://openalex.org/keywords/modularity","display_name":"Modularity (biology)","score":0.6530091166496277},{"id":"https://openalex.org/keywords/unix","display_name":"Unix","score":0.6460315585136414},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.629508376121521},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5922330021858215},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.5434054136276245},{"id":"https://openalex.org/keywords/digital-signal-processor","display_name":"Digital signal processor","score":0.5366792678833008},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.516360878944397},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.5020406246185303},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.5000386238098145},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3839157819747925},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2518996000289917}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8922529220581055},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.7842646837234497},{"id":"https://openalex.org/C2779478453","wikidata":"https://www.wikidata.org/wiki/Q6889748","display_name":"Modularity (biology)","level":2,"score":0.6530091166496277},{"id":"https://openalex.org/C112968700","wikidata":"https://www.wikidata.org/wiki/Q11368","display_name":"Unix","level":3,"score":0.6460315585136414},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.629508376121521},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5922330021858215},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.5434054136276245},{"id":"https://openalex.org/C161611012","wikidata":"https://www.wikidata.org/wiki/Q106370","display_name":"Digital signal processor","level":3,"score":0.5366792678833008},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.516360878944397},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.5020406246185303},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5000386238098145},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3839157819747925},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2518996000289917},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C54355233","wikidata":"https://www.wikidata.org/wiki/Q7162","display_name":"Genetics","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/0141-9331(86)90117-1","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0141-9331(86)90117-1","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.49000000953674316,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W2077843102","https://openalex.org/W2162837301","https://openalex.org/W3022893215","https://openalex.org/W4243937394","https://openalex.org/W6684079808"],"related_works":["https://openalex.org/W3215247250","https://openalex.org/W2319687164","https://openalex.org/W1556297113","https://openalex.org/W2572037897","https://openalex.org/W2077289773","https://openalex.org/W2352569066","https://openalex.org/W2532375706","https://openalex.org/W4239668215","https://openalex.org/W2379636925","https://openalex.org/W2390600871"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
