{"id":"https://openalex.org/W2093789012","doi":"https://doi.org/10.1016/0141-9331(86)90094-3","title":"Design for testability and built-in self-test for VLSI circuits","display_name":"Design for testability and built-in self-test for VLSI circuits","publication_year":1986,"publication_date":"1986-04-01","ids":{"openalex":"https://openalex.org/W2093789012","doi":"https://doi.org/10.1016/0141-9331(86)90094-3","mag":"2093789012"},"language":"en","primary_location":{"id":"doi:10.1016/0141-9331(86)90094-3","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0141-9331(86)90094-3","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111955990","display_name":"Hideo Fujiwara","orcid":null},"institutions":[{"id":"https://openalex.org/I16656306","display_name":"Meiji University","ror":"https://ror.org/02rqvrp93","country_code":"JP","type":"education","lineage":["https://openalex.org/I16656306"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Hideo Fujiwara","raw_affiliation_strings":["Department of Electronics and Communication, Meiji University, 1-1-1 Higashi-Mita, Tama-Ku, Kawasaki 214, Japan"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication, Meiji University, 1-1-1 Higashi-Mita, Tama-Ku, Kawasaki 214, Japan","institution_ids":["https://openalex.org/I16656306"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5111955990"],"corresponding_institution_ids":["https://openalex.org/I16656306"],"apc_list":{"value":2200,"currency":"USD","value_usd":2200},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.24802943,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"10","issue":"3","first_page":"139","last_page":"147"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/testability","display_name":"Testability","score":0.8207703828811646},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7990326881408691},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.7244876027107239},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.64979088306427},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5348243713378906},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.5292403697967529},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.5117923617362976},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.5052457451820374},{"id":"https://openalex.org/keywords/test-strategy","display_name":"Test strategy","score":0.48368650674819946},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.46871107816696167},{"id":"https://openalex.org/keywords/test","display_name":"Test (biology)","score":0.46664169430732727},{"id":"https://openalex.org/keywords/integration-testing","display_name":"Integration testing","score":0.4614258110523224},{"id":"https://openalex.org/keywords/test-compression","display_name":"Test compression","score":0.4565753936767578},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.44860389828681946},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3879253566265106},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.35871079564094543},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.14940854907035828},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.14625170826911926},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.07916960120201111}],"concepts":[{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.8207703828811646},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7990326881408691},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.7244876027107239},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.64979088306427},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5348243713378906},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.5292403697967529},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.5117923617362976},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.5052457451820374},{"id":"https://openalex.org/C188598960","wikidata":"https://www.wikidata.org/wiki/Q7705805","display_name":"Test strategy","level":3,"score":0.48368650674819946},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.46871107816696167},{"id":"https://openalex.org/C2777267654","wikidata":"https://www.wikidata.org/wiki/Q3519023","display_name":"Test (biology)","level":2,"score":0.46664169430732727},{"id":"https://openalex.org/C107683887","wikidata":"https://www.wikidata.org/wiki/Q782466","display_name":"Integration testing","level":3,"score":0.4614258110523224},{"id":"https://openalex.org/C29652920","wikidata":"https://www.wikidata.org/wiki/Q7705757","display_name":"Test compression","level":4,"score":0.4565753936767578},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.44860389828681946},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3879253566265106},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.35871079564094543},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.14940854907035828},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.14625170826911926},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.07916960120201111},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/0141-9331(86)90094-3","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0141-9331(86)90094-3","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":45,"referenced_works":["https://openalex.org/W327215","https://openalex.org/W52459088","https://openalex.org/W77054510","https://openalex.org/W81020658","https://openalex.org/W86288557","https://openalex.org/W103638709","https://openalex.org/W150546327","https://openalex.org/W197391467","https://openalex.org/W198417586","https://openalex.org/W204201480","https://openalex.org/W323249274","https://openalex.org/W1483338234","https://openalex.org/W1805015378","https://openalex.org/W1845681645","https://openalex.org/W1972369552","https://openalex.org/W1980752348","https://openalex.org/W1990311419","https://openalex.org/W2004437077","https://openalex.org/W2029173745","https://openalex.org/W2030106932","https://openalex.org/W2030850560","https://openalex.org/W2034476614","https://openalex.org/W2044076967","https://openalex.org/W2064759901","https://openalex.org/W2066974842","https://openalex.org/W2069681736","https://openalex.org/W2079863858","https://openalex.org/W2109678242","https://openalex.org/W2119635823","https://openalex.org/W2147769819","https://openalex.org/W2182112064","https://openalex.org/W2608590452","https://openalex.org/W6600011832","https://openalex.org/W6602054072","https://openalex.org/W6603265945","https://openalex.org/W6604212687","https://openalex.org/W6606077120","https://openalex.org/W6607914997","https://openalex.org/W6607990715","https://openalex.org/W6608343656","https://openalex.org/W6645396727","https://openalex.org/W6647803750","https://openalex.org/W6651354974","https://openalex.org/W6658224466","https://openalex.org/W6998940146"],"related_works":["https://openalex.org/W1603792055","https://openalex.org/W2022894844","https://openalex.org/W2886756146","https://openalex.org/W4245311057","https://openalex.org/W311918050","https://openalex.org/W2061326683","https://openalex.org/W2543176856","https://openalex.org/W2165948443","https://openalex.org/W2146381271","https://openalex.org/W2989178840"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}