{"id":"https://openalex.org/W1997751234","doi":"https://doi.org/10.1016/0141-9331(84)90121-2","title":"Parallel I/O options for 8085-based systems","display_name":"Parallel I/O options for 8085-based systems","publication_year":1984,"publication_date":"1984-03-01","ids":{"openalex":"https://openalex.org/W1997751234","doi":"https://doi.org/10.1016/0141-9331(84)90121-2","mag":"1997751234"},"language":"en","primary_location":{"id":"doi:10.1016/0141-9331(84)90121-2","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0141-9331(84)90121-2","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5062016478","display_name":"Vinayak Laxman Patil","orcid":"https://orcid.org/0000-0003-0943-9135"},"institutions":[{"id":"https://openalex.org/I41763900","display_name":"Central Electronics Engineering Research Institute","ror":"https://ror.org/01hh45364","country_code":"IN","type":"facility","lineage":["https://openalex.org/I2799351866","https://openalex.org/I41763900","https://openalex.org/I4210134808","https://openalex.org/I66760702"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"V.L. Patil","raw_affiliation_strings":["Central Electronics Engineering Research Institute, Pilani, India","Central Electronics Engineering Research Institute Pilani, India"],"affiliations":[{"raw_affiliation_string":"Central Electronics Engineering Research Institute, Pilani, India","institution_ids":["https://openalex.org/I41763900"]},{"raw_affiliation_string":"Central Electronics Engineering Research Institute Pilani, India","institution_ids":["https://openalex.org/I41763900"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5062016478"],"corresponding_institution_ids":["https://openalex.org/I41763900"],"apc_list":{"value":2200,"currency":"USD","value_usd":2200},"apc_paid":null,"fwci":0.6235,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.69920844,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"8","issue":"2","first_page":"86","last_page":"93"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9965000152587891,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9965000152587891,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9944000244140625,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/interfacing","display_name":"Interfacing","score":0.9281453490257263},{"id":"https://openalex.org/keywords/interrupt","display_name":"Interrupt","score":0.894296407699585},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8693566918373108},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.7085569500923157},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.69454026222229},{"id":"https://openalex.org/keywords/transfer","display_name":"Transfer (computing)","score":0.600152850151062},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.45661064982414246},{"id":"https://openalex.org/keywords/polling","display_name":"Polling","score":0.4339570999145508},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.38630211353302},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.28269970417022705},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.15185710787773132},{"id":"https://openalex.org/keywords/microcontroller","display_name":"Microcontroller","score":0.12701505422592163}],"concepts":[{"id":"https://openalex.org/C2776303644","wikidata":"https://www.wikidata.org/wiki/Q1020499","display_name":"Interfacing","level":2,"score":0.9281453490257263},{"id":"https://openalex.org/C41661131","wikidata":"https://www.wikidata.org/wiki/Q220764","display_name":"Interrupt","level":3,"score":0.894296407699585},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8693566918373108},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.7085569500923157},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.69454026222229},{"id":"https://openalex.org/C2776175482","wikidata":"https://www.wikidata.org/wiki/Q1195816","display_name":"Transfer (computing)","level":2,"score":0.600152850151062},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.45661064982414246},{"id":"https://openalex.org/C204854418","wikidata":"https://www.wikidata.org/wiki/Q1362921","display_name":"Polling","level":2,"score":0.4339570999145508},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.38630211353302},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.28269970417022705},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.15185710787773132},{"id":"https://openalex.org/C173018170","wikidata":"https://www.wikidata.org/wiki/Q165678","display_name":"Microcontroller","level":2,"score":0.12701505422592163}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/0141-9331(84)90121-2","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0141-9331(84)90121-2","pdf_url":null,"source":{"id":"https://openalex.org/S195663827","display_name":"Microprocessors and Microsystems","issn_l":"0141-9331","issn":["0141-9331","1872-9436"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Microprocessors and Microsystems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W4288898221","https://openalex.org/W2040387711","https://openalex.org/W2776504858","https://openalex.org/W4283362883","https://openalex.org/W91819603","https://openalex.org/W2100743976","https://openalex.org/W1605538634","https://openalex.org/W2373887801","https://openalex.org/W649172505","https://openalex.org/W2371350567"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
