{"id":"https://openalex.org/W2031975900","doi":"https://doi.org/10.1016/0010-4485(93)90065-v","title":"Solving VLSI physical design problems on a vector machine","display_name":"Solving VLSI physical design problems on a vector machine","publication_year":1993,"publication_date":"1993-01-01","ids":{"openalex":"https://openalex.org/W2031975900","doi":"https://doi.org/10.1016/0010-4485(93)90065-v","mag":"2031975900"},"language":"en","primary_location":{"id":"doi:10.1016/0010-4485(93)90065-v","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0010-4485(93)90065-v","pdf_url":null,"source":{"id":"https://openalex.org/S4210171473","display_name":"Computer-Aided Design","issn_l":"0010-4485","issn":["0010-4485","1879-2685"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Computer-Aided Design","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5036733255","display_name":"C.P. Ravikumar","orcid":"https://orcid.org/0000-0003-0809-5545"},"institutions":[{"id":"https://openalex.org/I68891433","display_name":"Indian Institute of Technology Delhi","ror":"https://ror.org/049tgcd06","country_code":"IN","type":"education","lineage":["https://openalex.org/I68891433"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"C.P. Ravikumar","raw_affiliation_strings":["Dept of Electrical Engineering, Indian Institute of Technology, New Delhi 110016, India"],"affiliations":[{"raw_affiliation_string":"Dept of Electrical Engineering, Indian Institute of Technology, New Delhi 110016, India","institution_ids":["https://openalex.org/I68891433"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5036733255"],"corresponding_institution_ids":["https://openalex.org/I68891433"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.15115481,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"25","issue":"1","first_page":"49","last_page":"57"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.781108021736145},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5904600620269775},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4295230805873871},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.412199467420578},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.367669939994812},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2747937738895416},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.19876310229301453}],"concepts":[{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.781108021736145},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5904600620269775},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4295230805873871},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.412199467420578},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.367669939994812},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2747937738895416},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.19876310229301453}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/0010-4485(93)90065-v","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0010-4485(93)90065-v","pdf_url":null,"source":{"id":"https://openalex.org/S4210171473","display_name":"Computer-Aided Design","issn_l":"0010-4485","issn":["0010-4485","1879-2685"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Computer-Aided Design","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W239283595","https://openalex.org/W1520460310","https://openalex.org/W1988685045","https://openalex.org/W1994314035","https://openalex.org/W2044348081","https://openalex.org/W2044944864","https://openalex.org/W2066495677","https://openalex.org/W2072974175","https://openalex.org/W2161455936","https://openalex.org/W6661955950"],"related_works":["https://openalex.org/W2181385951","https://openalex.org/W1727049600","https://openalex.org/W2183812348","https://openalex.org/W1481897060","https://openalex.org/W1617740971","https://openalex.org/W2134640991","https://openalex.org/W3027318491","https://openalex.org/W1607753725","https://openalex.org/W1979789826","https://openalex.org/W1986774039"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
