{"id":"https://openalex.org/W2094463918","doi":"https://doi.org/10.1016/0010-4485(92)90046-d","title":"Reliable sizing of power networks in VLSI circuits","display_name":"Reliable sizing of power networks in VLSI circuits","publication_year":1992,"publication_date":"1992-06-01","ids":{"openalex":"https://openalex.org/W2094463918","doi":"https://doi.org/10.1016/0010-4485(92)90046-d","mag":"2094463918"},"language":"en","primary_location":{"id":"doi:10.1016/0010-4485(92)90046-d","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0010-4485(92)90046-d","pdf_url":null,"source":{"id":"https://openalex.org/S4210171473","display_name":"Computer-Aided Design","issn_l":"0010-4485","issn":["0010-4485","1879-2685"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Computer-Aided Design","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101496899","display_name":"S. Chowdhury","orcid":"https://orcid.org/0000-0001-5025-8577"},"institutions":[{"id":"https://openalex.org/I126307644","display_name":"University of Iowa","ror":"https://ror.org/036jqmy94","country_code":"US","type":"education","lineage":["https://openalex.org/I126307644"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Chowdhury","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Iowa, Iowa City, IA 52242, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Iowa, Iowa City, IA 52242, USA","institution_ids":["https://openalex.org/I126307644"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5023471391","display_name":"J.S. Barkatullah","orcid":null},"institutions":[{"id":"https://openalex.org/I126307644","display_name":"University of Iowa","ror":"https://ror.org/036jqmy94","country_code":"US","type":"education","lineage":["https://openalex.org/I126307644"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J.S. Barkatullah","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Iowa, Iowa City, IA 52242, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Iowa, Iowa City, IA 52242, USA","institution_ids":["https://openalex.org/I126307644"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I126307644"],"apc_list":{"value":3390,"currency":"USD","value_usd":3390},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.17473436,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"24","issue":"6","first_page":"291","last_page":"300"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/sizing","display_name":"Sizing","score":0.8504682779312134},{"id":"https://openalex.org/keywords/redundancy","display_name":"Redundancy (engineering)","score":0.7289111614227295},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.6685483455657959},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5868953466415405},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.5820025205612183},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.5759605169296265},{"id":"https://openalex.org/keywords/voltage-drop","display_name":"Voltage drop","score":0.5697752833366394},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5410311222076416},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4908786416053772},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.41499584913253784},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.4060650169849396},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.40469077229499817},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.27727991342544556},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2721579074859619},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.26636549830436707},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.1682094931602478}],"concepts":[{"id":"https://openalex.org/C2777767291","wikidata":"https://www.wikidata.org/wiki/Q1080291","display_name":"Sizing","level":2,"score":0.8504682779312134},{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.7289111614227295},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.6685483455657959},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5868953466415405},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.5820025205612183},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.5759605169296265},{"id":"https://openalex.org/C82178898","wikidata":"https://www.wikidata.org/wiki/Q166839","display_name":"Voltage drop","level":3,"score":0.5697752833366394},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5410311222076416},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4908786416053772},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.41499584913253784},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.4060650169849396},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.40469077229499817},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.27727991342544556},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2721579074859619},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.26636549830436707},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.1682094931602478},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1016/0010-4485(92)90046-d","is_oa":false,"landing_page_url":"https://doi.org/10.1016/0010-4485(92)90046-d","pdf_url":null,"source":{"id":"https://openalex.org/S4210171473","display_name":"Computer-Aided Design","issn_l":"0010-4485","issn":["0010-4485","1879-2685"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320990","host_organization_name":"Elsevier BV","host_organization_lineage":["https://openalex.org/P4310320990"],"host_organization_lineage_names":["Elsevier BV"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Computer-Aided Design","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W570939567","https://openalex.org/W1666015432","https://openalex.org/W1967575124","https://openalex.org/W1990215011","https://openalex.org/W2014746566","https://openalex.org/W2163827229","https://openalex.org/W2165823161","https://openalex.org/W2168621788","https://openalex.org/W2326806701"],"related_works":["https://openalex.org/W2375311683","https://openalex.org/W2366062860","https://openalex.org/W2181385951","https://openalex.org/W1727049600","https://openalex.org/W2183812348","https://openalex.org/W1481897060","https://openalex.org/W4313890168","https://openalex.org/W2358255476","https://openalex.org/W1886723318","https://openalex.org/W4383535618"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-07-23T08:03:31.855105","created_date":"2025-10-10T00:00:00"}