{"id":"https://openalex.org/W3203502778","doi":"https://doi.org/10.1007/s10836-021-05963-z","title":"Clock-Less DFT and BIST for Dual-Rail Asynchronous Circuits","display_name":"Clock-Less DFT and BIST for Dual-Rail Asynchronous Circuits","publication_year":2021,"publication_date":"2021-08-01","ids":{"openalex":"https://openalex.org/W3203502778","doi":"https://doi.org/10.1007/s10836-021-05963-z","mag":"3203502778"},"language":"en","primary_location":{"id":"doi:10.1007/s10836-021-05963-z","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s10836-021-05963-z","pdf_url":null,"source":{"id":"https://openalex.org/S200807567","display_name":"Journal of Electronic Testing","issn_l":"0923-8174","issn":["0923-8174","1573-0727"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Electronic Testing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5088804059","display_name":"Tsai-Chieh Chen","orcid":"https://orcid.org/0000-0002-5100-4146"},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Tsai-Chieh Chen","raw_affiliation_strings":["Laboratory of Dependable Systems (LaDS), Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratory of Dependable Systems (LaDS), Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070796134","display_name":"Chia-Cheng Pai","orcid":null},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chia-Cheng Pai","raw_affiliation_strings":["Laboratory of Dependable Systems (LaDS), Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratory of Dependable Systems (LaDS), Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084695173","display_name":"Yi-Zhan Hsieh","orcid":null},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yi-Zhan Hsieh","raw_affiliation_strings":["Laboratory of Dependable Systems (LaDS), Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratory of Dependable Systems (LaDS), Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051166659","display_name":"Hsiao-Yin Tseng","orcid":null},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Hsiao-Yin Tseng","raw_affiliation_strings":["Laboratory of Dependable Systems (LaDS), Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratory of Dependable Systems (LaDS), Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034274583","display_name":"James Chien-Mo","orcid":null},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"James Chien-Mo","raw_affiliation_strings":["Laboratory of Dependable Systems (LaDS), Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratory of Dependable Systems (LaDS), Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066241253","display_name":"Tsung-Te Liu","orcid":"https://orcid.org/0000-0002-5433-9830"},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Tsung-Te Liu","raw_affiliation_strings":["Laboratory of Dependable Systems (LaDS), Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratory of Dependable Systems (LaDS), Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5053987397","display_name":"I-Wei Chiu","orcid":"https://orcid.org/0000-0003-0275-962X"},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"I-Wei Chiu","raw_affiliation_strings":["Laboratory of Dependable Systems (LaDS), Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan"],"raw_orcid":"https://orcid.org/0000-0003-0275-962X","affiliations":[{"raw_affiliation_string":"Laboratory of Dependable Systems (LaDS), Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5088804059"],"corresponding_institution_ids":["https://openalex.org/I16733864"],"apc_list":{"value":2390,"currency":"EUR","value_usd":2990},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.10818102,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"37","issue":"4","first_page":"453","last_page":"471"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.9011856317520142},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.6706314086914062},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6024529337882996},{"id":"https://openalex.org/keywords/asynchronous-system","display_name":"Asynchronous system","score":0.5591678023338318},{"id":"https://openalex.org/keywords/asynchronous-circuit","display_name":"Asynchronous circuit","score":0.5178947448730469},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.4819919466972351},{"id":"https://openalex.org/keywords/state","display_name":"State (computer science)","score":0.4670048952102661},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4590112566947937},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.45470744371414185},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.43681347370147705},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.4329821467399597},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.3625785708427429},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.35152673721313477},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24106639623641968},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.19614535570144653},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.12580394744873047},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.07619142532348633}],"concepts":[{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.9011856317520142},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.6706314086914062},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6024529337882996},{"id":"https://openalex.org/C7923308","wikidata":"https://www.wikidata.org/wiki/Q4812211","display_name":"Asynchronous system","level":5,"score":0.5591678023338318},{"id":"https://openalex.org/C87695204","wikidata":"https://www.wikidata.org/wiki/Q629971","display_name":"Asynchronous circuit","level":5,"score":0.5178947448730469},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.4819919466972351},{"id":"https://openalex.org/C48103436","wikidata":"https://www.wikidata.org/wiki/Q599031","display_name":"State (computer science)","level":2,"score":0.4670048952102661},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4590112566947937},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.45470744371414185},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.43681347370147705},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.4329821467399597},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.3625785708427429},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.35152673721313477},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24106639623641968},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.19614535570144653},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.12580394744873047},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07619142532348633},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.0},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/s10836-021-05963-z","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s10836-021-05963-z","pdf_url":null,"source":{"id":"https://openalex.org/S200807567","display_name":"Journal of Electronic Testing","issn_l":"0923-8174","issn":["0923-8174","1573-0727"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Electronic Testing","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.7799999713897705}],"awards":[],"funders":[{"id":"https://openalex.org/F4320322589","display_name":"Taiwan Semiconductor Manufacturing Company","ror":"https://ror.org/02wx79d08"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":28,"referenced_works":["https://openalex.org/W1604973310","https://openalex.org/W1941043554","https://openalex.org/W1975165972","https://openalex.org/W1983182592","https://openalex.org/W1992723344","https://openalex.org/W2031240799","https://openalex.org/W2091960397","https://openalex.org/W2099034654","https://openalex.org/W2107103004","https://openalex.org/W2110259743","https://openalex.org/W2111813487","https://openalex.org/W2116782815","https://openalex.org/W2117299791","https://openalex.org/W2128739788","https://openalex.org/W2147436399","https://openalex.org/W2147909695","https://openalex.org/W2150872535","https://openalex.org/W2161331676","https://openalex.org/W2166238841","https://openalex.org/W2508013019","https://openalex.org/W2554561296","https://openalex.org/W2624668974","https://openalex.org/W2789575913","https://openalex.org/W3149233332","https://openalex.org/W4249868543","https://openalex.org/W6676823145","https://openalex.org/W6676988442","https://openalex.org/W6682163942"],"related_works":["https://openalex.org/W364924225","https://openalex.org/W2384756109","https://openalex.org/W4312516786","https://openalex.org/W2237508561","https://openalex.org/W1993985975","https://openalex.org/W142020038","https://openalex.org/W803506773","https://openalex.org/W2078264798","https://openalex.org/W1671389381","https://openalex.org/W2184151347"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}