{"id":"https://openalex.org/W3130437014","doi":"https://doi.org/10.1007/s10836-021-05929-1","title":"Pre-Silicon Verification Using Multi-FPGA Platforms: A Review","display_name":"Pre-Silicon Verification Using Multi-FPGA Platforms: A Review","publication_year":2021,"publication_date":"2021-02-01","ids":{"openalex":"https://openalex.org/W3130437014","doi":"https://doi.org/10.1007/s10836-021-05929-1","mag":"3130437014"},"language":"en","primary_location":{"id":"doi:10.1007/s10836-021-05929-1","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s10836-021-05929-1","pdf_url":null,"source":{"id":"https://openalex.org/S200807567","display_name":"Journal of Electronic Testing","issn_l":"0923-8174","issn":["0923-8174","1573-0727"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Electronic Testing","raw_type":"journal-article"},"type":"review","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5088890905","display_name":"Umer Farooq","orcid":"https://orcid.org/0000-0002-5220-4908"},"institutions":[{"id":"https://openalex.org/I4210150237","display_name":"Dhofar University","ror":"https://ror.org/05d5f5m07","country_code":"OM","type":"education","lineage":["https://openalex.org/I4210150237"]}],"countries":["OM"],"is_corresponding":true,"raw_author_name":"Umer Farooq","raw_affiliation_strings":["Electrical and Computer Engineering Department, Dhofar University, Salalah, Oman"],"raw_orcid":"https://orcid.org/0000-0002-5220-4908","affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering Department, Dhofar University, Salalah, Oman","institution_ids":["https://openalex.org/I4210150237"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5108405631","display_name":"Habib Mehrez","orcid":null},"institutions":[{"id":"https://openalex.org/I39804081","display_name":"Sorbonne Universit\u00e9","ror":"https://ror.org/02en5vm52","country_code":"FR","type":"education","lineage":["https://openalex.org/I39804081"]},{"id":"https://openalex.org/I4210159731","display_name":"LIP6","ror":"https://ror.org/05krcen59","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I39804081","https://openalex.org/I4210159245","https://openalex.org/I4210159731"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Habib Mehrez","raw_affiliation_strings":["SoC, LiP6, Sorbonne Universite, Paris, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"SoC, LiP6, Sorbonne Universite, Paris, France","institution_ids":["https://openalex.org/I4210159731","https://openalex.org/I39804081"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5088890905"],"corresponding_institution_ids":["https://openalex.org/I4210150237"],"apc_list":{"value":2390,"currency":"EUR","value_usd":2990},"apc_paid":null,"fwci":1.2201,"has_fulltext":false,"cited_by_count":24,"citation_normalized_percentile":{"value":0.78249081,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":99},"biblio":{"volume":"37","issue":"1","first_page":"7","last_page":"24"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8063526153564453},{"id":"https://openalex.org/keywords/emulation","display_name":"Emulation","score":0.7123007774353027},{"id":"https://openalex.org/keywords/fpga-prototype","display_name":"FPGA prototype","score":0.6428017616271973},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6350001096725464},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5996249914169312},{"id":"https://openalex.org/keywords/virtual-prototyping","display_name":"Virtual prototyping","score":0.4991567134857178},{"id":"https://openalex.org/keywords/hardware-emulation","display_name":"Hardware emulation","score":0.4773692786693573},{"id":"https://openalex.org/keywords/rapid-prototyping","display_name":"Rapid prototyping","score":0.4435034394264221},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.43097835779190063},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3362980782985687},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2764747142791748},{"id":"https://openalex.org/keywords/simulation","display_name":"Simulation","score":0.15174058079719543}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8063526153564453},{"id":"https://openalex.org/C149810388","wikidata":"https://www.wikidata.org/wiki/Q5374873","display_name":"Emulation","level":2,"score":0.7123007774353027},{"id":"https://openalex.org/C203864433","wikidata":"https://www.wikidata.org/wiki/Q5426992","display_name":"FPGA prototype","level":3,"score":0.6428017616271973},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6350001096725464},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5996249914169312},{"id":"https://openalex.org/C2780991453","wikidata":"https://www.wikidata.org/wiki/Q3408177","display_name":"Virtual prototyping","level":2,"score":0.4991567134857178},{"id":"https://openalex.org/C94115699","wikidata":"https://www.wikidata.org/wiki/Q5656406","display_name":"Hardware emulation","level":3,"score":0.4773692786693573},{"id":"https://openalex.org/C2780395129","wikidata":"https://www.wikidata.org/wiki/Q1128971","display_name":"Rapid prototyping","level":2,"score":0.4435034394264221},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.43097835779190063},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3362980782985687},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2764747142791748},{"id":"https://openalex.org/C44154836","wikidata":"https://www.wikidata.org/wiki/Q45045","display_name":"Simulation","level":1,"score":0.15174058079719543},{"id":"https://openalex.org/C50522688","wikidata":"https://www.wikidata.org/wiki/Q189833","display_name":"Economic growth","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1007/s10836-021-05929-1","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s10836-021-05929-1","pdf_url":null,"source":{"id":"https://openalex.org/S200807567","display_name":"Journal of Electronic Testing","issn_l":"0923-8174","issn":["0923-8174","1573-0727"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Electronic Testing","raw_type":"journal-article"},{"id":"pmh:oai:sure.sunderland.ac.uk:16403","is_oa":false,"landing_page_url":"http://sure.sunderland.ac.uk/id/eprint/16403/","pdf_url":null,"source":{"id":"https://openalex.org/S4306402295","display_name":"Sunderland Repository (University of Sunderland)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I5728261","host_organization_name":"University of Sunderland","host_organization_lineage":["https://openalex.org/I5728261"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"PeerReviewed"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4099999964237213,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":53,"referenced_works":["https://openalex.org/W32337268","https://openalex.org/W564382181","https://openalex.org/W1554367240","https://openalex.org/W1555915743","https://openalex.org/W1591851732","https://openalex.org/W1628872871","https://openalex.org/W1757537413","https://openalex.org/W1979246114","https://openalex.org/W1980746862","https://openalex.org/W1992578807","https://openalex.org/W2003193909","https://openalex.org/W2007249115","https://openalex.org/W2010346244","https://openalex.org/W2011039300","https://openalex.org/W2024060531","https://openalex.org/W2037481744","https://openalex.org/W2063519198","https://openalex.org/W2069193082","https://openalex.org/W2070608594","https://openalex.org/W2096455207","https://openalex.org/W2104796877","https://openalex.org/W2108717395","https://openalex.org/W2109220922","https://openalex.org/W2109907925","https://openalex.org/W2120970098","https://openalex.org/W2120985183","https://openalex.org/W2122214419","https://openalex.org/W2123596153","https://openalex.org/W2124455101","https://openalex.org/W2125531986","https://openalex.org/W2127780907","https://openalex.org/W2130563646","https://openalex.org/W2131280546","https://openalex.org/W2132450497","https://openalex.org/W2144326053","https://openalex.org/W2148658001","https://openalex.org/W2155754954","https://openalex.org/W2161455936","https://openalex.org/W2172229083","https://openalex.org/W2275304190","https://openalex.org/W2725129414","https://openalex.org/W2772067181","https://openalex.org/W2799501948","https://openalex.org/W2804324442","https://openalex.org/W2895183628","https://openalex.org/W2907375804","https://openalex.org/W2994819686","https://openalex.org/W4229635340","https://openalex.org/W4230671627","https://openalex.org/W4231734403","https://openalex.org/W4232904085","https://openalex.org/W4236269389","https://openalex.org/W6685144686"],"related_works":["https://openalex.org/W2170071008","https://openalex.org/W2103996454","https://openalex.org/W3029775214","https://openalex.org/W2390650884","https://openalex.org/W2093057572","https://openalex.org/W2129151116","https://openalex.org/W2110651346","https://openalex.org/W2001552871","https://openalex.org/W2888526229","https://openalex.org/W119599369"],"abstract_inverted_index":null,"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":10},{"year":2024,"cited_by_count":6},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
