{"id":"https://openalex.org/W316117","doi":"https://doi.org/10.1007/978-3-642-31494-0_41","title":"Integrated Placement and Optimization Flow for Structured and Regular Logic","display_name":"Integrated Placement and Optimization Flow for Structured and Regular Logic","publication_year":2012,"publication_date":"2012-01-01","ids":{"openalex":"https://openalex.org/W316117","doi":"https://doi.org/10.1007/978-3-642-31494-0_41","mag":"316117"},"language":"en","primary_location":{"id":"doi:10.1007/978-3-642-31494-0_41","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-642-31494-0_41","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5029641132","display_name":"Vikram Singh Saun","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Vikram Singh Saun","raw_affiliation_strings":["Synopsys, India"],"affiliations":[{"raw_affiliation_string":"Synopsys, India","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101566646","display_name":"Suman Chatterjee","orcid":"https://orcid.org/0000-0001-5263-6930"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Suman Chatterjee","raw_affiliation_strings":["Synopsys, India"],"affiliations":[{"raw_affiliation_string":"Synopsys, India","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5018639371","display_name":"Anand Arunachalam","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Anand Arunachalam","raw_affiliation_strings":["Synopsys, India"],"affiliations":[{"raw_affiliation_string":"Synopsys, India","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5029641132"],"corresponding_institution_ids":[],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":0.4396,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.59191759,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"352","last_page":"353"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8141733407974243},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.5498181581497192},{"id":"https://openalex.org/keywords/selection","display_name":"Selection (genetic algorithm)","score":0.5385156273841858},{"id":"https://openalex.org/keywords/flow","display_name":"Flow (mathematics)","score":0.537094235420227},{"id":"https://openalex.org/keywords/power-flow","display_name":"Power flow","score":0.519199013710022},{"id":"https://openalex.org/keywords/data-flow-analysis","display_name":"Data-flow analysis","score":0.4896464943885803},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4523249566555023},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4423995912075043},{"id":"https://openalex.org/keywords/logic-optimization","display_name":"Logic optimization","score":0.4354996383190155},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4218299686908722},{"id":"https://openalex.org/keywords/expressive-power","display_name":"Expressive power","score":0.41999152302742004},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.41316288709640503},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.3905670940876007},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.38535276055336},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.37741270661354065},{"id":"https://openalex.org/keywords/data-flow-diagram","display_name":"Data flow diagram","score":0.36871129274368286},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.2536405026912689},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.22211560606956482},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.18810716271400452},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.13580232858657837},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.09420377016067505},{"id":"https://openalex.org/keywords/electric-power-system","display_name":"Electric power system","score":0.08348357677459717},{"id":"https://openalex.org/keywords/database","display_name":"Database","score":0.08078208565711975}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8141733407974243},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.5498181581497192},{"id":"https://openalex.org/C81917197","wikidata":"https://www.wikidata.org/wiki/Q628760","display_name":"Selection (genetic algorithm)","level":2,"score":0.5385156273841858},{"id":"https://openalex.org/C38349280","wikidata":"https://www.wikidata.org/wiki/Q1434290","display_name":"Flow (mathematics)","level":2,"score":0.537094235420227},{"id":"https://openalex.org/C2986056383","wikidata":"https://www.wikidata.org/wiki/Q556030","display_name":"Power flow","level":4,"score":0.519199013710022},{"id":"https://openalex.org/C88468194","wikidata":"https://www.wikidata.org/wiki/Q1172416","display_name":"Data-flow analysis","level":3,"score":0.4896464943885803},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4523249566555023},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4423995912075043},{"id":"https://openalex.org/C28449271","wikidata":"https://www.wikidata.org/wiki/Q6667469","display_name":"Logic optimization","level":4,"score":0.4354996383190155},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4218299686908722},{"id":"https://openalex.org/C195818886","wikidata":"https://www.wikidata.org/wiki/Q5421724","display_name":"Expressive power","level":2,"score":0.41999152302742004},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.41316288709640503},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3905670940876007},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.38535276055336},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.37741270661354065},{"id":"https://openalex.org/C489000","wikidata":"https://www.wikidata.org/wiki/Q747385","display_name":"Data flow diagram","level":2,"score":0.36871129274368286},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.2536405026912689},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.22211560606956482},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.18810716271400452},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.13580232858657837},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.09420377016067505},{"id":"https://openalex.org/C89227174","wikidata":"https://www.wikidata.org/wiki/Q2388981","display_name":"Electric power system","level":3,"score":0.08348357677459717},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.08078208565711975},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/978-3-642-31494-0_41","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-642-31494-0_41","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":2,"referenced_works":["https://openalex.org/W2055704923","https://openalex.org/W2145554290"],"related_works":["https://openalex.org/W59945861","https://openalex.org/W1551967076","https://openalex.org/W2151163382","https://openalex.org/W4247095439","https://openalex.org/W4256382613","https://openalex.org/W2146286671","https://openalex.org/W2130825721","https://openalex.org/W316163056","https://openalex.org/W2138414258","https://openalex.org/W2092972345"],"abstract_inverted_index":null,"counts_by_year":[{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}