{"id":"https://openalex.org/W1948085093","doi":"https://doi.org/10.1007/978-3-642-15323-5_1","title":"Measuring the Performance and Intrinsic Variability of Evolved Circuits","display_name":"Measuring the Performance and Intrinsic Variability of Evolved Circuits","publication_year":2010,"publication_date":"2010-01-01","ids":{"openalex":"https://openalex.org/W1948085093","doi":"https://doi.org/10.1007/978-3-642-15323-5_1","mag":"1948085093"},"language":"en","primary_location":{"id":"doi:10.1007/978-3-642-15323-5_1","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-642-15323-5_1","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5017600718","display_name":"James Alfred Walker","orcid":"https://orcid.org/0000-0003-2174-7173"},"institutions":[{"id":"https://openalex.org/I52099693","display_name":"University of York","ror":"https://ror.org/04m01e293","country_code":"GB","type":"education","lineage":["https://openalex.org/I52099693"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"James Alfred Walker","raw_affiliation_strings":["Intelligent Systems Group, Department of Electronics, University of York, Heslington, York, YO10 5DD, UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intelligent Systems Group, Department of Electronics, University of York, Heslington, York, YO10 5DD, UK","institution_ids":["https://openalex.org/I52099693"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5015048030","display_name":"James A. Hilder","orcid":null},"institutions":[{"id":"https://openalex.org/I52099693","display_name":"University of York","ror":"https://ror.org/04m01e293","country_code":"GB","type":"education","lineage":["https://openalex.org/I52099693"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"James A. Hilder","raw_affiliation_strings":["Intelligent Systems Group, Department of Electronics, University of York, Heslington, York, YO10 5DD, UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intelligent Systems Group, Department of Electronics, University of York, Heslington, York, YO10 5DD, UK","institution_ids":["https://openalex.org/I52099693"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5048789717","display_name":"Andy M. Tyrrell","orcid":"https://orcid.org/0000-0002-8533-2404"},"institutions":[{"id":"https://openalex.org/I52099693","display_name":"University of York","ror":"https://ror.org/04m01e293","country_code":"GB","type":"education","lineage":["https://openalex.org/I52099693"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Andy M. Tyrrell","raw_affiliation_strings":["Department of Electronics, Intelligent Systems Group, University of York, YO10 5DD, York, UK","Intelligent Systems Group, Department of Electronics, University of York, Heslington, York, YO10 5DD, UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics, Intelligent Systems Group, University of York, YO10 5DD, York, UK","institution_ids":["https://openalex.org/I52099693"]},{"raw_affiliation_string":"Intelligent Systems Group, Department of Electronics, University of York, Heslington, York, YO10 5DD, UK","institution_ids":["https://openalex.org/I52099693"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I52099693"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"12"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11975","display_name":"Evolutionary Algorithms and Applications","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11975","display_name":"Evolutionary Algorithms and Applications","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11663","display_name":"Viral Infectious Diseases and Gene Expression in Insects","score":0.9922999739646912,"subfield":{"id":"https://openalex.org/subfields/1312","display_name":"Molecular Biology"},"field":{"id":"https://openalex.org/fields/13","display_name":"Biochemistry, Genetics and Molecular Biology"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T10100","display_name":"Metaheuristic Optimization Algorithms Research","score":0.9916999936103821,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.8062489628791809},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7566781044006348},{"id":"https://openalex.org/keywords/schematic","display_name":"Schematic","score":0.7199988961219788},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.6141515374183655},{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.5552830696105957},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.5308172702789307},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4720286428928375},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.46861156821250916},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4335038661956787},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.4303182363510132},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.42720675468444824},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4162508249282837},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.41516488790512085},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.4146222174167633},{"id":"https://openalex.org/keywords/4-bit","display_name":"4-bit","score":0.4138990640640259},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3667421340942383},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.3438015580177307},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.2823776304721832},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2429894506931305},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.20412984490394592},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.19685378670692444},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.15825805068016052},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1131601631641388}],"concepts":[{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.8062489628791809},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7566781044006348},{"id":"https://openalex.org/C192328126","wikidata":"https://www.wikidata.org/wiki/Q4514647","display_name":"Schematic","level":2,"score":0.7199988961219788},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.6141515374183655},{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.5552830696105957},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.5308172702789307},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4720286428928375},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.46861156821250916},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4335038661956787},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.4303182363510132},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.42720675468444824},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4162508249282837},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.41516488790512085},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.4146222174167633},{"id":"https://openalex.org/C194986542","wikidata":"https://www.wikidata.org/wiki/Q229932","display_name":"4-bit","level":3,"score":0.4138990640640259},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3667421340942383},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.3438015580177307},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.2823776304721832},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2429894506931305},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.20412984490394592},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.19685378670692444},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.15825805068016052},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1131601631641388},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/978-3-642-15323-5_1","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-642-15323-5_1","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6299999952316284,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1552527487","https://openalex.org/W1576818901","https://openalex.org/W1775913388","https://openalex.org/W1966117767","https://openalex.org/W1969369546","https://openalex.org/W1974906265","https://openalex.org/W1990245197","https://openalex.org/W1995226797","https://openalex.org/W2021042811","https://openalex.org/W2059193309","https://openalex.org/W2115073796","https://openalex.org/W2126105956","https://openalex.org/W2144085963","https://openalex.org/W2165042123","https://openalex.org/W2477448550","https://openalex.org/W2604796233"],"related_works":["https://openalex.org/W2151657833","https://openalex.org/W2031753133","https://openalex.org/W2126379574","https://openalex.org/W2070693700","https://openalex.org/W1596716095","https://openalex.org/W2577477803","https://openalex.org/W2156138647","https://openalex.org/W2078506771","https://openalex.org/W1995592656","https://openalex.org/W2134664711"],"abstract_inverted_index":null,"counts_by_year":[{"year":2016,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}