{"id":"https://openalex.org/W1571624615","doi":"https://doi.org/10.1007/978-3-540-95948-9_16","title":"Static Timing Model Extraction for Combinational Circuits","display_name":"Static Timing Model Extraction for Combinational Circuits","publication_year":2009,"publication_date":"2009-01-01","ids":{"openalex":"https://openalex.org/W1571624615","doi":"https://doi.org/10.1007/978-3-540-95948-9_16","mag":"1571624615"},"language":"en","primary_location":{"id":"doi:10.1007/978-3-540-95948-9_16","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-540-95948-9_16","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["arxiv","crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://arxiv.org/pdf/1705.02610","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Bing Li","orcid":null},"institutions":[{"id":"https://openalex.org/I62916508","display_name":"Technical University of Munich","ror":"https://ror.org/02kkvpp62","country_code":"DE","type":"education","lineage":["https://openalex.org/I62916508"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Bing Li","raw_affiliation_strings":["Department of Electrical Engineering and Information Technology, Technische Universitaet Muenchen, Arcisstrasse 21, 80333, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Information Technology, Technische Universitaet Muenchen, Arcisstrasse 21, 80333, Munich, Germany","institution_ids":["https://openalex.org/I62916508"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Christoph Knoth","orcid":null},"institutions":[{"id":"https://openalex.org/I62916508","display_name":"Technical University of Munich","ror":"https://ror.org/02kkvpp62","country_code":"DE","type":"education","lineage":["https://openalex.org/I62916508"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Christoph Knoth","raw_affiliation_strings":["Department of Electrical Engineering and Information Technology, Technische Universitaet Muenchen, Arcisstrasse 21, 80333, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Information Technology, Technische Universitaet Muenchen, Arcisstrasse 21, 80333, Munich, Germany","institution_ids":["https://openalex.org/I62916508"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Walter Schneider","orcid":null},"institutions":[{"id":"https://openalex.org/I62916508","display_name":"Technical University of Munich","ror":"https://ror.org/02kkvpp62","country_code":"DE","type":"education","lineage":["https://openalex.org/I62916508"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Walter Schneider","raw_affiliation_strings":["Department of Electrical Engineering and Information Technology, Technische Universitaet Muenchen, Arcisstrasse 21, 80333, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Information Technology, Technische Universitaet Muenchen, Arcisstrasse 21, 80333, Munich, Germany","institution_ids":["https://openalex.org/I62916508"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Manuel Schmidt","orcid":null},"institutions":[{"id":"https://openalex.org/I62916508","display_name":"Technical University of Munich","ror":"https://ror.org/02kkvpp62","country_code":"DE","type":"education","lineage":["https://openalex.org/I62916508"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Manuel Schmidt","raw_affiliation_strings":["Department of Electrical Engineering and Information Technology, Technische Universitaet Muenchen, Arcisstrasse 21, 80333, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Information Technology, Technische Universitaet Muenchen, Arcisstrasse 21, 80333, Munich, Germany","institution_ids":["https://openalex.org/I62916508"]}]},{"author_position":"last","author":{"id":null,"display_name":"Ulf Schlichtmann","orcid":null},"institutions":[{"id":"https://openalex.org/I62916508","display_name":"Technical University of Munich","ror":"https://ror.org/02kkvpp62","country_code":"DE","type":"education","lineage":["https://openalex.org/I62916508"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Ulf Schlichtmann","raw_affiliation_strings":["Department of Electrical Engineering and Information Technology, Technische Universitaet Muenchen, Arcisstrasse 21, 80333, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Information Technology, Technische Universitaet Muenchen, Arcisstrasse 21, 80333, Munich, Germany","institution_ids":["https://openalex.org/I62916508"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I62916508"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.14479045,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"156","last_page":"166"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9239000082015991,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9239000082015991,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.015200000256299973,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.014999999664723873,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.9205999970436096},{"id":"https://openalex.org/keywords/delay-calculation","display_name":"Delay calculation","score":0.5038999915122986},{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.45419999957084656},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4269999861717224},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.3481999933719635},{"id":"https://openalex.org/keywords/extraction","display_name":"Extraction (chemistry)","score":0.31540000438690186},{"id":"https://openalex.org/keywords/circuit-extraction","display_name":"Circuit extraction","score":0.3077000081539154}],"concepts":[{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.9205999970436096},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.848800003528595},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5565000176429749},{"id":"https://openalex.org/C174086752","wikidata":"https://www.wikidata.org/wiki/Q5253471","display_name":"Delay calculation","level":3,"score":0.5038999915122986},{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.45419999957084656},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4269999861717224},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3693000078201294},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.3481999933719635},{"id":"https://openalex.org/C4725764","wikidata":"https://www.wikidata.org/wiki/Q844704","display_name":"Extraction (chemistry)","level":2,"score":0.31540000438690186},{"id":"https://openalex.org/C26490066","wikidata":"https://www.wikidata.org/wiki/Q17006835","display_name":"Circuit extraction","level":4,"score":0.3077000081539154},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.3068999946117401},{"id":"https://openalex.org/C2777131613","wikidata":"https://www.wikidata.org/wiki/Q18394147","display_name":"Retard","level":2,"score":0.3068999946117401},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.2919999957084656},{"id":"https://openalex.org/C97686452","wikidata":"https://www.wikidata.org/wiki/Q7604153","display_name":"Static analysis","level":2,"score":0.2883000075817108},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.2797999978065491},{"id":"https://openalex.org/C2989134064","wikidata":"https://www.wikidata.org/wiki/Q288510","display_name":"Execution time","level":2,"score":0.26589998602867126},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.2581999897956848},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.2526000142097473}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1007/978-3-540-95948-9_16","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-540-95948-9_16","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},{"id":"pmh:oai:arXiv.org:1705.02610","is_oa":true,"landing_page_url":"http://arxiv.org/abs/1705.02610","pdf_url":"https://arxiv.org/pdf/1705.02610","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"}],"best_oa_location":{"id":"pmh:oai:arXiv.org:1705.02610","is_oa":true,"landing_page_url":"http://arxiv.org/abs/1705.02610","pdf_url":"https://arxiv.org/pdf/1705.02610","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W2112173236","https://openalex.org/W2154018883","https://openalex.org/W2159888461","https://openalex.org/W4233178071","https://openalex.org/W4236097829","https://openalex.org/W4239284318"],"related_works":[],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2016-06-24T00:00:00"}