{"id":"https://openalex.org/W1544205852","doi":"https://doi.org/10.1007/978-3-540-30102-8_42","title":"A Novel Rename Register Architecture and Performance Analysis","display_name":"A Novel Rename Register Architecture and Performance Analysis","publication_year":2004,"publication_date":"2004-01-01","ids":{"openalex":"https://openalex.org/W1544205852","doi":"https://doi.org/10.1007/978-3-540-30102-8_42","mag":"1544205852"},"language":"en","primary_location":{"id":"doi:10.1007/978-3-540-30102-8_42","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-540-30102-8_42","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111822524","display_name":"Zhenyu Liu","orcid":"https://orcid.org/0000-0001-7559-8519"},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Zhenyu Liu","raw_affiliation_strings":["Institute of Microelectronics of Tsinghua University, Beijing, 100084, P. R. China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics of Tsinghua University, Beijing, 100084, P. R. China","institution_ids":["https://openalex.org/I99065089","https://openalex.org/I4210119392"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5038577167","display_name":"Qi jia-yue","orcid":null},"institutions":[{"id":"https://openalex.org/I4210119392","display_name":"Institute of Microelectronics","ror":"https://ror.org/02s6gs133","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210119392"]},{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jiayue Qi","raw_affiliation_strings":["Institute of Microelectronics of Tsinghua University, Beijing, 100084, P. R. China"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics of Tsinghua University, Beijing, 100084, P. R. China","institution_ids":["https://openalex.org/I99065089","https://openalex.org/I4210119392"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5111822524"],"corresponding_institution_ids":["https://openalex.org/I4210119392","https://openalex.org/I99065089"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.16650718,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"503","last_page":"514"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9922999739646912,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8982627987861633},{"id":"https://openalex.org/keywords/register-allocation","display_name":"Register allocation","score":0.5473341345787048},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4818792939186096},{"id":"https://openalex.org/keywords/processor-register","display_name":"Processor register","score":0.47094547748565674},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4565415680408478},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.44213634729385376},{"id":"https://openalex.org/keywords/register-file","display_name":"Register file","score":0.41875240206718445},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.3844771385192871},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3547336459159851},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.19720155000686646},{"id":"https://openalex.org/keywords/memory-address","display_name":"Memory address","score":0.07632094621658325},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.0742821991443634},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.061195701360702515}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8982627987861633},{"id":"https://openalex.org/C128916667","wikidata":"https://www.wikidata.org/wiki/Q1343660","display_name":"Register allocation","level":3,"score":0.5473341345787048},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4818792939186096},{"id":"https://openalex.org/C2871975","wikidata":"https://www.wikidata.org/wiki/Q187466","display_name":"Processor register","level":4,"score":0.47094547748565674},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4565415680408478},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.44213634729385376},{"id":"https://openalex.org/C117280010","wikidata":"https://www.wikidata.org/wiki/Q180944","display_name":"Register file","level":3,"score":0.41875240206718445},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.3844771385192871},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3547336459159851},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.19720155000686646},{"id":"https://openalex.org/C153247305","wikidata":"https://www.wikidata.org/wiki/Q835713","display_name":"Memory address","level":3,"score":0.07632094621658325},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.0742821991443634},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.061195701360702515},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/978-3-540-30102-8_42","is_oa":false,"landing_page_url":"https://doi.org/10.1007/978-3-540-30102-8_42","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.5099999904632568}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W2111438909","https://openalex.org/W2112833506","https://openalex.org/W2138351227","https://openalex.org/W2156174665","https://openalex.org/W2159774811","https://openalex.org/W2161864047","https://openalex.org/W2168910052","https://openalex.org/W2169123391"],"related_works":["https://openalex.org/W2224192221","https://openalex.org/W1967889241","https://openalex.org/W2111377238","https://openalex.org/W2161297616","https://openalex.org/W3117494601","https://openalex.org/W4247209662","https://openalex.org/W2159389028","https://openalex.org/W2195435904","https://openalex.org/W2148662141","https://openalex.org/W3022691489"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
