{"id":"https://openalex.org/W1492612004","doi":"https://doi.org/10.1007/3-540-53065-7_117","title":"Design and simulation of a multistage interconnection network","display_name":"Design and simulation of a multistage interconnection network","publication_year":1990,"publication_date":"1990-01-01","ids":{"openalex":"https://openalex.org/W1492612004","doi":"https://doi.org/10.1007/3-540-53065-7_117","mag":"1492612004"},"language":"en","primary_location":{"id":"doi:10.1007/3-540-53065-7_117","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-53065-7_117","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5077935601","display_name":"Rudolf Holzner","orcid":null},"institutions":[{"id":"https://openalex.org/I1325886976","display_name":"Siemens (Germany)","ror":"https://ror.org/059mq0909","country_code":"DE","type":"company","lineage":["https://openalex.org/I1325886976"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Rudolf Holzner","raw_affiliation_strings":["Siemens AG, ZFE IS SYS 32, Otto-Hahn-Ring 6, 8000, M\u00fcnchen 83, W. Germany","ZFE IS SYS 32"],"affiliations":[{"raw_affiliation_string":"Siemens AG, ZFE IS SYS 32, Otto-Hahn-Ring 6, 8000, M\u00fcnchen 83, W. Germany","institution_ids":["https://openalex.org/I1325886976"]},{"raw_affiliation_string":"ZFE IS SYS 32","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5024195816","display_name":"Stefan Tomann","orcid":null},"institutions":[{"id":"https://openalex.org/I1325886976","display_name":"Siemens (Germany)","ror":"https://ror.org/059mq0909","country_code":"DE","type":"company","lineage":["https://openalex.org/I1325886976"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Stefan Tomann","raw_affiliation_strings":["Siemens AG, ZFE IS SYS 32, Otto-Hahn-Ring 6, 8000, M\u00fcnchen 83, W. Germany","ZFE IS SYS 32"],"affiliations":[{"raw_affiliation_string":"Siemens AG, ZFE IS SYS 32, Otto-Hahn-Ring 6, 8000, M\u00fcnchen 83, W. Germany","institution_ids":["https://openalex.org/I1325886976"]},{"raw_affiliation_string":"ZFE IS SYS 32","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5077935601"],"corresponding_institution_ids":["https://openalex.org/I1325886976"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":3.0798,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.90931373,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"385","last_page":"396"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9943000078201294,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9929999709129333,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8577815294265747},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.7884129881858826},{"id":"https://openalex.org/keywords/crossbar-switch","display_name":"Crossbar switch","score":0.7225107550621033},{"id":"https://openalex.org/keywords/lisp","display_name":"Lisp","score":0.6549755334854126},{"id":"https://openalex.org/keywords/multistage-interconnection-networks","display_name":"Multistage interconnection networks","score":0.5898497104644775},{"id":"https://openalex.org/keywords/network-packet","display_name":"Network packet","score":0.5373002886772156},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.5080907344818115},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.4783365726470947},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.4717724323272705},{"id":"https://openalex.org/keywords/packet-switching","display_name":"Packet switching","score":0.45157259702682495},{"id":"https://openalex.org/keywords/circuit-switching","display_name":"Circuit switching","score":0.4413992762565613},{"id":"https://openalex.org/keywords/network-switch","display_name":"Network switch","score":0.4267146587371826},{"id":"https://openalex.org/keywords/lan-switching","display_name":"LAN switching","score":0.4195483326911926},{"id":"https://openalex.org/keywords/port","display_name":"Port (circuit theory)","score":0.4152825176715851},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3609684705734253},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.32915180921554565},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3092579245567322},{"id":"https://openalex.org/keywords/burst-switching","display_name":"Burst switching","score":0.12034353613853455},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.11914926767349243},{"id":"https://openalex.org/keywords/transmission-delay","display_name":"Transmission delay","score":0.11448517441749573},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09310975670814514},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.08607238531112671}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8577815294265747},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.7884129881858826},{"id":"https://openalex.org/C29984679","wikidata":"https://www.wikidata.org/wiki/Q1929149","display_name":"Crossbar switch","level":2,"score":0.7225107550621033},{"id":"https://openalex.org/C190883126","wikidata":"https://www.wikidata.org/wiki/Q132874","display_name":"Lisp","level":2,"score":0.6549755334854126},{"id":"https://openalex.org/C2776832011","wikidata":"https://www.wikidata.org/wiki/Q6935099","display_name":"Multistage interconnection networks","level":3,"score":0.5898497104644775},{"id":"https://openalex.org/C158379750","wikidata":"https://www.wikidata.org/wiki/Q214111","display_name":"Network packet","level":2,"score":0.5373002886772156},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.5080907344818115},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.4783365726470947},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.4717724323272705},{"id":"https://openalex.org/C113508815","wikidata":"https://www.wikidata.org/wiki/Q193446","display_name":"Packet switching","level":3,"score":0.45157259702682495},{"id":"https://openalex.org/C74294265","wikidata":"https://www.wikidata.org/wiki/Q506273","display_name":"Circuit switching","level":2,"score":0.4413992762565613},{"id":"https://openalex.org/C119404949","wikidata":"https://www.wikidata.org/wiki/Q4503","display_name":"Network switch","level":2,"score":0.4267146587371826},{"id":"https://openalex.org/C185498113","wikidata":"https://www.wikidata.org/wiki/Q4503","display_name":"LAN switching","level":5,"score":0.4195483326911926},{"id":"https://openalex.org/C32802771","wikidata":"https://www.wikidata.org/wiki/Q2443617","display_name":"Port (circuit theory)","level":2,"score":0.4152825176715851},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3609684705734253},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.32915180921554565},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3092579245567322},{"id":"https://openalex.org/C180026317","wikidata":"https://www.wikidata.org/wiki/Q5000645","display_name":"Burst switching","level":4,"score":0.12034353613853455},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.11914926767349243},{"id":"https://openalex.org/C108921912","wikidata":"https://www.wikidata.org/wiki/Q7834639","display_name":"Transmission delay","level":3,"score":0.11448517441749573},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09310975670814514},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.08607238531112671},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/3-540-53065-7_117","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-53065-7_117","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":2,"referenced_works":["https://openalex.org/W9416910","https://openalex.org/W2060738294"],"related_works":["https://openalex.org/W2071685753","https://openalex.org/W1971294334","https://openalex.org/W2230563444","https://openalex.org/W8314501","https://openalex.org/W2124251445","https://openalex.org/W2112772280","https://openalex.org/W2138285635","https://openalex.org/W4385695330","https://openalex.org/W2098368968","https://openalex.org/W1513984890"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
