{"id":"https://openalex.org/W1488283129","doi":"https://doi.org/10.1007/3-540-44411-4_8","title":"Physical Design of CMOS Chips in Six Easy Steps","display_name":"Physical Design of CMOS Chips in Six Easy Steps","publication_year":2000,"publication_date":"2000-01-01","ids":{"openalex":"https://openalex.org/W1488283129","doi":"https://doi.org/10.1007/3-540-44411-4_8","mag":"1488283129"},"language":"en","primary_location":{"id":"doi:10.1007/3-540-44411-4_8","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-44411-4_8","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"},"type":"book-chapter","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5016144950","display_name":"Sidney E. Benda","orcid":null},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]},{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["GB","US"],"is_corresponding":true,"raw_author_name":"Sidney E. Benda","raw_affiliation_strings":["Colorado Springs Design Center, Intel Corp., USA","Intel Corporation"],"affiliations":[{"raw_affiliation_string":"Colorado Springs Design Center, Intel Corp., USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5016144950"],"corresponding_institution_ids":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"],"apc_list":{"value":5000,"currency":"EUR","value_usd":5392},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.114735,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"115","last_page":"128"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11159","display_name":"Manufacturing Process and Optimization","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2209","display_name":"Industrial and Manufacturing Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11159","display_name":"Manufacturing Process and Optimization","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2209","display_name":"Industrial and Manufacturing Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12176","display_name":"Optimization and Packing Problems","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2209","display_name":"Industrial and Manufacturing Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8380424976348877},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.7574487924575806},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.7289550304412842},{"id":"https://openalex.org/keywords/floorplan","display_name":"Floorplan","score":0.6640130281448364},{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.6351346969604492},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.5974892973899841},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.5466693639755249},{"id":"https://openalex.org/keywords/representation","display_name":"Representation (politics)","score":0.5425413846969604},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5298963189125061},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5218780636787415},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.506567120552063},{"id":"https://openalex.org/keywords/integrated-circuit-layout","display_name":"Integrated circuit layout","score":0.4626636505126953},{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.447912335395813},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3569743037223816},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.352730929851532},{"id":"https://openalex.org/keywords/engineering-drawing","display_name":"Engineering drawing","score":0.3435991406440735},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.30063632130622864},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.23684826493263245},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.22367221117019653},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.21416515111923218},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.08613350987434387},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.0659974217414856}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8380424976348877},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.7574487924575806},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.7289550304412842},{"id":"https://openalex.org/C130145326","wikidata":"https://www.wikidata.org/wiki/Q1553985","display_name":"Floorplan","level":2,"score":0.6640130281448364},{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.6351346969604492},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.5974892973899841},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5466693639755249},{"id":"https://openalex.org/C2776359362","wikidata":"https://www.wikidata.org/wiki/Q2145286","display_name":"Representation (politics)","level":3,"score":0.5425413846969604},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5298963189125061},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5218780636787415},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.506567120552063},{"id":"https://openalex.org/C2765594","wikidata":"https://www.wikidata.org/wiki/Q2624187","display_name":"Integrated circuit layout","level":3,"score":0.4626636505126953},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.447912335395813},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3569743037223816},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.352730929851532},{"id":"https://openalex.org/C199639397","wikidata":"https://www.wikidata.org/wiki/Q1788588","display_name":"Engineering drawing","level":1,"score":0.3435991406440735},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.30063632130622864},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.23684826493263245},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.22367221117019653},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.21416515111923218},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.08613350987434387},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0659974217414856},{"id":"https://openalex.org/C199539241","wikidata":"https://www.wikidata.org/wiki/Q7748","display_name":"Law","level":1,"score":0.0},{"id":"https://openalex.org/C17744445","wikidata":"https://www.wikidata.org/wiki/Q36442","display_name":"Political science","level":0,"score":0.0},{"id":"https://openalex.org/C94625758","wikidata":"https://www.wikidata.org/wiki/Q7163","display_name":"Politics","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/3-540-44411-4_8","is_oa":false,"landing_page_url":"https://doi.org/10.1007/3-540-44411-4_8","pdf_url":null,"source":{"id":"https://openalex.org/S106296714","display_name":"Lecture notes in computer science","issn_l":"0302-9743","issn":["0302-9743","1611-3349"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"book series"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Lecture Notes in Computer Science","raw_type":"book-chapter"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/11","display_name":"Sustainable cities and communities","score":0.5199999809265137}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W160647843","https://openalex.org/W616528662","https://openalex.org/W1544310393","https://openalex.org/W1606129576","https://openalex.org/W1987786682","https://openalex.org/W2044348081","https://openalex.org/W2066757307","https://openalex.org/W2111104699","https://openalex.org/W2137311139","https://openalex.org/W2144473140","https://openalex.org/W2153580689","https://openalex.org/W4230650924","https://openalex.org/W4236626993","https://openalex.org/W4246008302","https://openalex.org/W4300809515"],"related_works":["https://openalex.org/W2171793444","https://openalex.org/W2376726667","https://openalex.org/W2115502122","https://openalex.org/W2150722449","https://openalex.org/W4238891425","https://openalex.org/W4321510758","https://openalex.org/W2138401961","https://openalex.org/W2173109281","https://openalex.org/W2357425846","https://openalex.org/W2165817382"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}