{"id":"https://openalex.org/W2963269590","doi":"https://doi.org/10.1007/s11390-007-9007-9","title":"Higher-Level Hardware Synthesis of the KASUMI Algorithm","display_name":"Higher-Level Hardware Synthesis of the KASUMI Algorithm","publication_year":2007,"publication_date":"2007-01-01","ids":{"openalex":"https://openalex.org/W2963269590","doi":"https://doi.org/10.1007/s11390-007-9007-9","mag":"2963269590"},"language":"en","primary_location":{"id":"doi:10.1007/s11390-007-9007-9","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s11390-007-9007-9","pdf_url":null,"source":{"id":"https://openalex.org/S161516442","display_name":"Journal of Computer Science and Technology","issn_l":"1000-9000","issn":["1000-9000","1860-4749"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Computer Science and Technology","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5043874913","display_name":"Issam Damaj","orcid":"https://orcid.org/0000-0001-7855-3535"},"institutions":[{"id":"https://openalex.org/I4210150237","display_name":"Dhofar University","ror":"https://ror.org/05d5f5m07","country_code":"OM","type":"education","lineage":["https://openalex.org/I4210150237"]}],"countries":["OM"],"is_corresponding":true,"raw_author_name":"Issam W. Damaj","raw_affiliation_strings":["Electrical and Computer Engineering Department, Dhofar University, P.O. Box 2509, Salalah, 211, Oman"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering Department, Dhofar University, P.O. Box 2509, Salalah, 211, Oman","institution_ids":["https://openalex.org/I4210150237"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5043874913"],"corresponding_institution_ids":["https://openalex.org/I4210150237"],"apc_list":{"value":3090,"currency":"USD","value_usd":3090},"apc_paid":null,"fwci":1.0062,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.84398406,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"22","issue":"1","first_page":"60","last_page":"70"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9969000220298767,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8743630647659302},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6090067625045776},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.578447699546814},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.5241358876228333},{"id":"https://openalex.org/keywords/virtex","display_name":"Virtex","score":0.5186171531677246},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5027406215667725},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.4154527485370636},{"id":"https://openalex.org/keywords/hardware-description-language","display_name":"Hardware description language","score":0.4124462604522705},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4107682704925537},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3525252044200897},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.1836409568786621}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8743630647659302},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6090067625045776},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.578447699546814},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.5241358876228333},{"id":"https://openalex.org/C2777674469","wikidata":"https://www.wikidata.org/wiki/Q20741011","display_name":"Virtex","level":3,"score":0.5186171531677246},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5027406215667725},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.4154527485370636},{"id":"https://openalex.org/C42143788","wikidata":"https://www.wikidata.org/wiki/Q173341","display_name":"Hardware description language","level":3,"score":0.4124462604522705},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4107682704925537},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3525252044200897},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.1836409568786621}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/s11390-007-9007-9","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s11390-007-9007-9","pdf_url":null,"source":{"id":"https://openalex.org/S161516442","display_name":"Journal of Computer Science and Technology","issn_l":"1000-9000","issn":["1000-9000","1860-4749"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Computer Science and Technology","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W119570465","https://openalex.org/W1507693023","https://openalex.org/W1998875295","https://openalex.org/W2048167605","https://openalex.org/W2109580720","https://openalex.org/W2153122838","https://openalex.org/W2183580140","https://openalex.org/W2286447785","https://openalex.org/W3144368627","https://openalex.org/W4256255138"],"related_works":["https://openalex.org/W2110818533","https://openalex.org/W1917852300","https://openalex.org/W2384838054","https://openalex.org/W2139058049","https://openalex.org/W2548456620","https://openalex.org/W2075214143","https://openalex.org/W2376018793","https://openalex.org/W2911649771","https://openalex.org/W2169179842","https://openalex.org/W2148697719"],"abstract_inverted_index":null,"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2026-08-21T09:56:20.448147","created_date":"2025-10-10T00:00:00"}