{"id":"https://openalex.org/W4294845056","doi":"https://doi.org/10.1007/s11334-022-00479-x","title":"Power-aware partitioning and test time reduction for 3D-SoC","display_name":"Power-aware partitioning and test time reduction for 3D-SoC","publication_year":2022,"publication_date":"2022-09-06","ids":{"openalex":"https://openalex.org/W4294845056","doi":"https://doi.org/10.1007/s11334-022-00479-x"},"language":"en","primary_location":{"id":"doi:10.1007/s11334-022-00479-x","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s11334-022-00479-x","pdf_url":null,"source":{"id":"https://openalex.org/S151239915","display_name":"Innovations in Systems and Software Engineering","issn_l":"1614-5046","issn":["1614-5046","1614-5054"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Innovations in Systems and Software Engineering","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5039922629","display_name":"Sabyasachee Banerjee","orcid":"https://orcid.org/0000-0001-8934-0391"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Sabyasachee Banerjee","raw_affiliation_strings":["Department of Computer Science and Engineering, Heritage Institute of Technology, Kolkata, WB, 700107, India"],"raw_orcid":"https://orcid.org/0000-0001-8934-0391","affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Heritage Institute of Technology, Kolkata, WB, 700107, India","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033411778","display_name":"Subhashis Majumder","orcid":"https://orcid.org/0000-0002-0849-9016"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Subhashis Majumder","raw_affiliation_strings":["Department of Computer Science and Engineering, Heritage Institute of Technology, Kolkata, WB, 700107, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Heritage Institute of Technology, Kolkata, WB, 700107, India","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067730042","display_name":"Bhargab B. Bhattacharya","orcid":"https://orcid.org/0000-0002-5890-2483"},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Bhargab B. Bhattacharya","raw_affiliation_strings":["Department of Computer Science and Engineering, Indian Institute of Technology Kharagpur, Kharagpur, WB, 721302, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Indian Institute of Technology Kharagpur, Kharagpur, WB, 721302, India","institution_ids":["https://openalex.org/I145894827"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5059700720","display_name":"Debesh K. Das","orcid":"https://orcid.org/0000-0003-1736-1497"},"institutions":[{"id":"https://openalex.org/I170979836","display_name":"Jadavpur University","ror":"https://ror.org/02af4h012","country_code":"IN","type":"education","lineage":["https://openalex.org/I170979836"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Debesh K. Das","raw_affiliation_strings":["Department of Computer Science and Engineering, Jadavpur University, Kolkata, WB, 700032, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Jadavpur University, Kolkata, WB, 700032, India","institution_ids":["https://openalex.org/I170979836"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5039922629"],"corresponding_institution_ids":[],"apc_list":{"value":2190,"currency":"EUR","value_usd":2790},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.10407321,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"20","issue":"3","first_page":"485","last_page":"498"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/three-dimensional-integrated-circuit","display_name":"Three-dimensional integrated circuit","score":0.692852258682251},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.5964987874031067},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5875021815299988},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5496901869773865},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.5381873846054077},{"id":"https://openalex.org/keywords/dissipation","display_name":"Dissipation","score":0.5264825820922852},{"id":"https://openalex.org/keywords/through-silicon-via","display_name":"Through-silicon via","score":0.4788267910480499},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.47167500853538513},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.4662420153617859},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.46447861194610596},{"id":"https://openalex.org/keywords/software-deployment","display_name":"Software deployment","score":0.4586728513240814},{"id":"https://openalex.org/keywords/power-budget","display_name":"Power budget","score":0.45629242062568665},{"id":"https://openalex.org/keywords/thermal-management-of-electronic-devices-and-systems","display_name":"Thermal management of electronic devices and systems","score":0.428091436624527},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.42116978764533997},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.4180833101272583},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.38957738876342773},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24073553085327148},{"id":"https://openalex.org/keywords/electric-power-system","display_name":"Electric power system","score":0.15683934092521667},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.12931472063064575},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.09086617827415466}],"concepts":[{"id":"https://openalex.org/C59088047","wikidata":"https://www.wikidata.org/wiki/Q229370","display_name":"Three-dimensional integrated circuit","level":3,"score":0.692852258682251},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.5964987874031067},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5875021815299988},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5496901869773865},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.5381873846054077},{"id":"https://openalex.org/C135402231","wikidata":"https://www.wikidata.org/wiki/Q898440","display_name":"Dissipation","level":2,"score":0.5264825820922852},{"id":"https://openalex.org/C45632049","wikidata":"https://www.wikidata.org/wiki/Q1578120","display_name":"Through-silicon via","level":3,"score":0.4788267910480499},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.47167500853538513},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.4662420153617859},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.46447861194610596},{"id":"https://openalex.org/C105339364","wikidata":"https://www.wikidata.org/wiki/Q2297740","display_name":"Software deployment","level":2,"score":0.4586728513240814},{"id":"https://openalex.org/C149768029","wikidata":"https://www.wikidata.org/wiki/Q1509342","display_name":"Power budget","level":4,"score":0.45629242062568665},{"id":"https://openalex.org/C114834414","wikidata":"https://www.wikidata.org/wiki/Q15477170","display_name":"Thermal management of electronic devices and systems","level":2,"score":0.428091436624527},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.42116978764533997},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.4180833101272583},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.38957738876342773},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24073553085327148},{"id":"https://openalex.org/C89227174","wikidata":"https://www.wikidata.org/wiki/Q2388981","display_name":"Electric power system","level":3,"score":0.15683934092521667},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.12931472063064575},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.09086617827415466},{"id":"https://openalex.org/C160671074","wikidata":"https://www.wikidata.org/wiki/Q267131","display_name":"Wafer","level":2,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/s11334-022-00479-x","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s11334-022-00479-x","pdf_url":null,"source":{"id":"https://openalex.org/S151239915","display_name":"Innovations in Systems and Software Engineering","issn_l":"1614-5046","issn":["1614-5046","1614-5054"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Innovations in Systems and Software Engineering","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.699999988079071,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W1595498733","https://openalex.org/W1978869809","https://openalex.org/W2022657006","https://openalex.org/W2103022917","https://openalex.org/W2113126942","https://openalex.org/W2119648869","https://openalex.org/W2120246395","https://openalex.org/W2129967550","https://openalex.org/W2144195001","https://openalex.org/W2149132218","https://openalex.org/W2162086806","https://openalex.org/W2165642910","https://openalex.org/W2169584262","https://openalex.org/W2171495277","https://openalex.org/W2316107989","https://openalex.org/W2582497033","https://openalex.org/W2795040920","https://openalex.org/W3109712504","https://openalex.org/W3136310872","https://openalex.org/W4244496923","https://openalex.org/W4247382390"],"related_works":["https://openalex.org/W2549021975","https://openalex.org/W2339457127","https://openalex.org/W4312936350","https://openalex.org/W3001671786","https://openalex.org/W2203995780","https://openalex.org/W4320009879","https://openalex.org/W2066337006","https://openalex.org/W1979571823","https://openalex.org/W2886805502","https://openalex.org/W4294845056"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}