{"id":"https://openalex.org/W2530320616","doi":"https://doi.org/10.1007/s11265-016-1185-7","title":"FPGA-Based Soft-Core Processors for Image Processing Applications","display_name":"FPGA-Based Soft-Core Processors for Image Processing Applications","publication_year":2016,"publication_date":"2016-10-10","ids":{"openalex":"https://openalex.org/W2530320616","doi":"https://doi.org/10.1007/s11265-016-1185-7","mag":"2530320616","pmid":"https://pubmed.ncbi.nlm.nih.gov/32226579"},"language":"en","primary_location":{"id":"doi:10.1007/s11265-016-1185-7","is_oa":true,"landing_page_url":"https://doi.org/10.1007/s11265-016-1185-7","pdf_url":"https://link.springer.com/content/pdf/10.1007%2Fs11265-016-1185-7.pdf","source":{"id":"https://openalex.org/S11258463","display_name":"Journal of Signal Processing Systems","issn_l":"1939-8018","issn":["1939-8018","1939-8115"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Signal Processing Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref","pubmed"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://link.springer.com/content/pdf/10.1007%2Fs11265-016-1185-7.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5068977936","display_name":"Moslem Amiri","orcid":null},"institutions":[{"id":"https://openalex.org/I126231945","display_name":"Queen's University Belfast","ror":"https://ror.org/00hswnk62","country_code":"GB","type":"education","lineage":["https://openalex.org/I126231945"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"Moslem Amiri","raw_affiliation_strings":["1School of Electronics, Electrical Engineering and Computer Science, Queen's University Belfast, Stranmillis Road, Belfast, Northern Ireland UK","School of Electronics, Electrical Engineering and Computer Science, Queen's University Belfast, Stranmillis Road, Belfast, Northern Ireland, UK"],"affiliations":[{"raw_affiliation_string":"1School of Electronics, Electrical Engineering and Computer Science, Queen's University Belfast, Stranmillis Road, Belfast, Northern Ireland UK","institution_ids":[]},{"raw_affiliation_string":"School of Electronics, Electrical Engineering and Computer Science, Queen's University Belfast, Stranmillis Road, Belfast, Northern Ireland, UK","institution_ids":["https://openalex.org/I126231945"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085167798","display_name":"Fahad Siddiqui","orcid":"https://orcid.org/0000-0002-4334-9478"},"institutions":[{"id":"https://openalex.org/I126231945","display_name":"Queen's University Belfast","ror":"https://ror.org/00hswnk62","country_code":"GB","type":"education","lineage":["https://openalex.org/I126231945"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Fahad Manzoor Siddiqui","raw_affiliation_strings":["1School of Electronics, Electrical Engineering and Computer Science, Queen's University Belfast, Stranmillis Road, Belfast, Northern Ireland UK","School of Electronics, Electrical Engineering and Computer Science, Queen's University Belfast, Stranmillis Road, Belfast, Northern Ireland, UK"],"affiliations":[{"raw_affiliation_string":"1School of Electronics, Electrical Engineering and Computer Science, Queen's University Belfast, Stranmillis Road, Belfast, Northern Ireland UK","institution_ids":[]},{"raw_affiliation_string":"School of Electronics, Electrical Engineering and Computer Science, Queen's University Belfast, Stranmillis Road, Belfast, Northern Ireland, UK","institution_ids":["https://openalex.org/I126231945"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081647872","display_name":"Colm Kelly","orcid":null},"institutions":[{"id":"https://openalex.org/I4210093062","display_name":"Thales (United Kingdom)","ror":"https://ror.org/00r8j9489","country_code":"GB","type":"company","lineage":["https://openalex.org/I4210093062","https://openalex.org/I4210140930"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Colm Kelly","raw_affiliation_strings":["2Thales, Belfast, Northern Ireland UK","Thales, Belfast, Northern Ireland, UK"],"affiliations":[{"raw_affiliation_string":"2Thales, Belfast, Northern Ireland UK","institution_ids":[]},{"raw_affiliation_string":"Thales, Belfast, Northern Ireland, UK","institution_ids":["https://openalex.org/I4210093062"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043910265","display_name":"Roger Woods","orcid":"https://orcid.org/0000-0001-6201-4270"},"institutions":[{"id":"https://openalex.org/I126231945","display_name":"Queen's University Belfast","ror":"https://ror.org/00hswnk62","country_code":"GB","type":"education","lineage":["https://openalex.org/I126231945"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Roger Woods","raw_affiliation_strings":["1School of Electronics, Electrical Engineering and Computer Science, Queen's University Belfast, Stranmillis Road, Belfast, Northern Ireland UK","School of Electronics, Electrical Engineering and Computer Science, Queen's University Belfast, Stranmillis Road, Belfast, Northern Ireland, UK"],"affiliations":[{"raw_affiliation_string":"1School of Electronics, Electrical Engineering and Computer Science, Queen's University Belfast, Stranmillis Road, Belfast, Northern Ireland UK","institution_ids":[]},{"raw_affiliation_string":"School of Electronics, Electrical Engineering and Computer Science, Queen's University Belfast, Stranmillis Road, Belfast, Northern Ireland, UK","institution_ids":["https://openalex.org/I126231945"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023499716","display_name":"Karen Rafferty","orcid":"https://orcid.org/0000-0002-7443-7876"},"institutions":[{"id":"https://openalex.org/I126231945","display_name":"Queen's University Belfast","ror":"https://ror.org/00hswnk62","country_code":"GB","type":"education","lineage":["https://openalex.org/I126231945"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Karen Rafferty","raw_affiliation_strings":["1School of Electronics, Electrical Engineering and Computer Science, Queen's University Belfast, Stranmillis Road, Belfast, Northern Ireland UK","School of Electronics, Electrical Engineering and Computer Science, Queen's University Belfast, Stranmillis Road, Belfast, Northern Ireland, UK"],"affiliations":[{"raw_affiliation_string":"1School of Electronics, Electrical Engineering and Computer Science, Queen's University Belfast, Stranmillis Road, Belfast, Northern Ireland UK","institution_ids":[]},{"raw_affiliation_string":"School of Electronics, Electrical Engineering and Computer Science, Queen's University Belfast, Stranmillis Road, Belfast, Northern Ireland, UK","institution_ids":["https://openalex.org/I126231945"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5060563341","display_name":"Burak Bardak","orcid":null},"institutions":[{"id":"https://openalex.org/I116528569","display_name":"European University of Lefke","ror":"https://ror.org/00t7bpe49","country_code":"TR","type":"education","lineage":["https://openalex.org/I116528569"]}],"countries":["TR"],"is_corresponding":false,"raw_author_name":"Burak Bardak","raw_affiliation_strings":["3Department of Computer Engineering, European University of Lefke, Gemikonagi, Turkey","Department of Computer Engineering, European University of Lefke, Gemikonagi, Turkey"],"affiliations":[{"raw_affiliation_string":"3Department of Computer Engineering, European University of Lefke, Gemikonagi, Turkey","institution_ids":[]},{"raw_affiliation_string":"Department of Computer Engineering, European University of Lefke, Gemikonagi, Turkey","institution_ids":["https://openalex.org/I116528569"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5068977936"],"corresponding_institution_ids":["https://openalex.org/I126231945"],"apc_list":{"value":2490,"currency":"EUR","value_usd":3090},"apc_paid":{"value":2490,"currency":"EUR","value_usd":3090},"fwci":1.3015,"has_fulltext":true,"cited_by_count":30,"citation_normalized_percentile":{"value":0.82890985,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":"87","issue":"1","first_page":"139","last_page":"156"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8517704010009766},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8349959850311279},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.6058773994445801},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.5668928027153015},{"id":"https://openalex.org/keywords/debugging","display_name":"Debugging","score":0.5564068555831909},{"id":"https://openalex.org/keywords/data-flow-diagram","display_name":"Data flow diagram","score":0.5530586242675781},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.5269696712493896},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5143390893936157},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.5043238401412964},{"id":"https://openalex.org/keywords/histogram","display_name":"Histogram","score":0.493026465177536},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3713272213935852},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.36063307523727417},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3385474383831024},{"id":"https://openalex.org/keywords/image","display_name":"Image (mathematics)","score":0.31817537546157837},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.1825520396232605}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8517704010009766},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8349959850311279},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.6058773994445801},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.5668928027153015},{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.5564068555831909},{"id":"https://openalex.org/C489000","wikidata":"https://www.wikidata.org/wiki/Q747385","display_name":"Data flow diagram","level":2,"score":0.5530586242675781},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.5269696712493896},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5143390893936157},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.5043238401412964},{"id":"https://openalex.org/C53533937","wikidata":"https://www.wikidata.org/wiki/Q185020","display_name":"Histogram","level":3,"score":0.493026465177536},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3713272213935852},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.36063307523727417},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3385474383831024},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.31817537546157837},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.1825520396232605},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":6,"locations":[{"id":"doi:10.1007/s11265-016-1185-7","is_oa":true,"landing_page_url":"https://doi.org/10.1007/s11265-016-1185-7","pdf_url":"https://link.springer.com/content/pdf/10.1007%2Fs11265-016-1185-7.pdf","source":{"id":"https://openalex.org/S11258463","display_name":"Journal of Signal Processing Systems","issn_l":"1939-8018","issn":["1939-8018","1939-8115"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Signal Processing Systems","raw_type":"journal-article"},{"id":"pmid:32226579","is_oa":false,"landing_page_url":"https://pubmed.ncbi.nlm.nih.gov/32226579","pdf_url":null,"source":{"id":"https://openalex.org/S4306525036","display_name":"PubMed","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1299303238","host_organization_name":"National Institutes of Health","host_organization_lineage":["https://openalex.org/I1299303238"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of signal processing systems","raw_type":null},{"id":"pmh:oai:pure.qub.ac.uk/portal:publications/271be7af-016c-4243-99ef-c243ed81b1db","is_oa":true,"landing_page_url":"https://pure.qub.ac.uk/en/publications/271be7af-016c-4243-99ef-c243ed81b1db","pdf_url":null,"source":{"id":"https://openalex.org/S4306402319","display_name":"Research Portal (Queen's University Belfast)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I126231945","host_organization_name":"Queen's University Belfast","host_organization_lineage":["https://openalex.org/I126231945"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Amiri, M, Siddiqui, F M, Kelly, C, Woods, R, Rafferty, K & Bardak, B 2017, 'FPGA-based soft-core processors for image processing applications', Journal of Signal Processing Systems, vol. 87, no. 1, pp. 139-156. https://doi.org/10.1007/s11265-016-1185-7","raw_type":"info:eu-repo/semantics/publishedVersion"},{"id":"pmh:oai:pubmedcentral.nih.gov:7089673","is_oa":true,"landing_page_url":"https://www.ncbi.nlm.nih.gov/pmc/articles/7089673","pdf_url":null,"source":{"id":"https://openalex.org/S2764455111","display_name":"PubMed Central","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1299303238","host_organization_name":"National Institutes of Health","host_organization_lineage":["https://openalex.org/I1299303238"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"J Signal Process Syst","raw_type":"Text"},{"id":"pmh:oai:pure.atira.dk:openaire/b00ccb33-ae42-4153-855e-14a3e4f4bc7b","is_oa":true,"landing_page_url":"https://pureportal.coventry.ac.uk/en/publications/b00ccb33-ae42-4153-855e-14a3e4f4bc7b","pdf_url":null,"source":{"id":"https://openalex.org/S4306402411","display_name":"Pure (Coventry University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I73417466","host_organization_name":"Coventry University","host_organization_lineage":["https://openalex.org/I73417466"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Amiri, M, Siddiqui, F, Kelly, C, Woods, R, Rafferty, K & Bardak, B 2017, 'FPGA-Based Soft-Core Processors for Image Processing Applications', Journal of Signal Processing Systems, vol. 87, no. 1, pp. 139-156. https://doi.org/10.1007/s11265-016-1185-7","raw_type":"article"},{"id":"pmh:oai:pure.atira.dk:publications/b00ccb33-ae42-4153-855e-14a3e4f4bc7b","is_oa":true,"landing_page_url":"https://pureportal.coventry.ac.uk/en/publications/fpgabased-softcore-processors-for-image-processing-applications(b00ccb33-ae42-4153-855e-14a3e4f4bc7b).html","pdf_url":null,"source":{"id":"https://openalex.org/S4306402411","display_name":"Pure (Coventry University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I73417466","host_organization_name":"Coventry University","host_organization_lineage":["https://openalex.org/I73417466"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":""}],"best_oa_location":{"id":"doi:10.1007/s11265-016-1185-7","is_oa":true,"landing_page_url":"https://doi.org/10.1007/s11265-016-1185-7","pdf_url":"https://link.springer.com/content/pdf/10.1007%2Fs11265-016-1185-7.pdf","source":{"id":"https://openalex.org/S11258463","display_name":"Journal of Signal Processing Systems","issn_l":"1939-8018","issn":["1939-8018","1939-8115"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Signal Processing Systems","raw_type":"journal-article"},"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.4099999964237213}],"awards":[{"id":"https://openalex.org/G8018675113","display_name":null,"funder_award_id":"EP/K009583/1","funder_id":"https://openalex.org/F4320334627","funder_display_name":"Engineering and Physical Sciences Research Council"}],"funders":[{"id":"https://openalex.org/F4320311518","display_name":"Heriot-Watt University","ror":"https://ror.org/04mghma93"},{"id":"https://openalex.org/F4320334627","display_name":"Engineering and Physical Sciences Research Council","ror":"https://ror.org/0439y7842"}],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2530320616.pdf","grobid_xml":"https://content.openalex.org/works/W2530320616.grobid-xml"},"referenced_works_count":26,"referenced_works":["https://openalex.org/W1497905817","https://openalex.org/W1524679748","https://openalex.org/W1559577056","https://openalex.org/W1915513928","https://openalex.org/W1973747955","https://openalex.org/W1987163471","https://openalex.org/W2009295221","https://openalex.org/W2017626143","https://openalex.org/W2018055497","https://openalex.org/W2026908439","https://openalex.org/W2029837033","https://openalex.org/W2033178848","https://openalex.org/W2063910796","https://openalex.org/W2074091263","https://openalex.org/W2075645037","https://openalex.org/W2100500718","https://openalex.org/W2109574129","https://openalex.org/W2114194010","https://openalex.org/W2125415493","https://openalex.org/W2129601732","https://openalex.org/W2130425801","https://openalex.org/W2161969291","https://openalex.org/W2163841853","https://openalex.org/W2166029537","https://openalex.org/W2171318521","https://openalex.org/W2473790947"],"related_works":["https://openalex.org/W4321442002","https://openalex.org/W2015265939","https://openalex.org/W2284072287","https://openalex.org/W2611067230","https://openalex.org/W4235469518","https://openalex.org/W2387706296","https://openalex.org/W2155788121","https://openalex.org/W2480201319","https://openalex.org/W2294325978","https://openalex.org/W2890345561"],"abstract_inverted_index":{"With":[0],"security":[1],"and":[2,14,53,58,81,145],"surveillance,":[3],"there":[4],"is":[5,120],"an":[6],"increasing":[7],"need":[8],"to":[9,77,85,108],"process":[10,42],"image":[11],"data":[12,23,82],"efficiently":[13],"effectively":[15],"either":[16],"at":[17],"source":[18],"or":[19],"in":[20,48],"a":[21,26,34,64,115,126],"large":[22],"network.":[24],"Whilst":[25],"Field-Programmable":[27],"Gate":[28],"Array":[29],"has":[30,43],"been":[31,44],"seen":[32],"as":[33,46],"key":[35],"technology":[36],"for":[37,56,114],"enabling":[38],"this,":[39],"the":[40,51,75,79,87,105,110,140],"design":[41,95,106,136,142],"viewed":[45],"problematic":[47],"terms":[49],"of":[50,67,89,117,128],"time":[52],"effort":[54],"needed":[55],"implementation":[57,113],"verification.":[59],"The":[60,97],"work":[61],"here":[62],"proposes":[63],"different":[65],"approach":[66],"using":[68],"optimized":[69],"FPGA-based":[70],"soft-core":[71],"processors":[72],"which":[73,123],"allows":[74],"user":[76],"exploit":[78],"task":[80],"level":[83],"parallelism":[84],"achieve":[86],"quality":[88],"dedicated":[90],"FPGA":[91,151],"implementations":[92],"whilst":[93,138],"reducing":[94],"time.":[96],"paper":[98],"also":[99,121],"reports":[100],"some":[101],"preliminary":[102],"progress":[103],"on":[104],"flow":[107],"program":[109],"structure.":[111],"An":[112],"Histogram":[116],"Gradients":[118],"algorithm":[119],"reported":[122],"shows":[124],"that":[125],"performance":[127],"328":[129],"fps":[130],"can":[131],"be":[132],"achieved":[133],"with":[134,149],"this":[135],"approach,":[137],"avoiding":[139],"long":[141],"time,":[143],"verification":[144],"debugging":[146],"steps":[147],"associated":[148],"conventional":[150],"implementations.":[152]},"counts_by_year":[{"year":2024,"cited_by_count":4},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":6},{"year":2020,"cited_by_count":7},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":4},{"year":2017,"cited_by_count":1}],"updated_date":"2026-04-21T08:09:41.155169","created_date":"2025-10-10T00:00:00"}