{"id":"https://openalex.org/W2051258777","doi":"https://doi.org/10.1007/s11265-013-0840-5","title":"A Practical FPGA-Based Architecture for Arbitrary-Ratio Sample Rate Conversion","display_name":"A Practical FPGA-Based Architecture for Arbitrary-Ratio Sample Rate Conversion","publication_year":2013,"publication_date":"2013-09-17","ids":{"openalex":"https://openalex.org/W2051258777","doi":"https://doi.org/10.1007/s11265-013-0840-5","mag":"2051258777"},"language":"en","primary_location":{"id":"doi:10.1007/s11265-013-0840-5","is_oa":true,"landing_page_url":"https://doi.org/10.1007/s11265-013-0840-5","pdf_url":"https://link.springer.com/content/pdf/10.1007/s11265-013-0840-5.pdf","source":{"id":"https://openalex.org/S11258463","display_name":"Journal of Signal Processing Systems","issn_l":"1939-8018","issn":["1939-8018","1939-8115"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Signal Processing Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://link.springer.com/content/pdf/10.1007/s11265-013-0840-5.pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5003547455","display_name":"Brunel Happi Tietche","orcid":null},"institutions":[{"id":"https://openalex.org/I86175216","display_name":"\u00c9cole Nationale Sup\u00e9rieure de l'\u00c9lectronique et de ses Applications","ror":"https://ror.org/03qeacd72","country_code":"FR","type":"education","lineage":["https://openalex.org/I86175216"]},{"id":"https://openalex.org/I4210142324","display_name":"CY Cergy Paris Universit\u00e9","ror":"https://ror.org/043htjv09","country_code":"FR","type":"education","lineage":["https://openalex.org/I4210142324"]},{"id":"https://openalex.org/I39804081","display_name":"Sorbonne Universit\u00e9","ror":"https://ror.org/02en5vm52","country_code":"FR","type":"education","lineage":["https://openalex.org/I39804081"]},{"id":"https://openalex.org/I98910050","display_name":"ESPCI Paris","ror":"https://ror.org/03zx86w41","country_code":"FR","type":"education","lineage":["https://openalex.org/I190752583","https://openalex.org/I2746051580","https://openalex.org/I98910050"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Brunel Happi Tietche","raw_affiliation_strings":["ETIS laboratory, UMR8051, ENSEA/Cergy-Pontoise University, Cergy-Pontoise, France","Pierre and Marie Curie University/SIGMA laboratory, ESPCI, Paris, France"],"affiliations":[{"raw_affiliation_string":"ETIS laboratory, UMR8051, ENSEA/Cergy-Pontoise University, Cergy-Pontoise, France","institution_ids":["https://openalex.org/I86175216","https://openalex.org/I4210142324"]},{"raw_affiliation_string":"Pierre and Marie Curie University/SIGMA laboratory, ESPCI, Paris, France","institution_ids":["https://openalex.org/I39804081","https://openalex.org/I98910050"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010347556","display_name":"Olivier Romain","orcid":"https://orcid.org/0000-0002-2172-1865"},"institutions":[{"id":"https://openalex.org/I86175216","display_name":"\u00c9cole Nationale Sup\u00e9rieure de l'\u00c9lectronique et de ses Applications","ror":"https://ror.org/03qeacd72","country_code":"FR","type":"education","lineage":["https://openalex.org/I86175216"]},{"id":"https://openalex.org/I4210142324","display_name":"CY Cergy Paris Universit\u00e9","ror":"https://ror.org/043htjv09","country_code":"FR","type":"education","lineage":["https://openalex.org/I4210142324"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Olivier Romain","raw_affiliation_strings":["ETIS laboratory, UMR8051, ENSEA/Cergy-Pontoise University, Cergy-Pontoise, France"],"affiliations":[{"raw_affiliation_string":"ETIS laboratory, UMR8051, ENSEA/Cergy-Pontoise University, Cergy-Pontoise, France","institution_ids":["https://openalex.org/I86175216","https://openalex.org/I4210142324"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5029785566","display_name":"B. Denby","orcid":"https://orcid.org/0000-0003-4572-1656"},"institutions":[{"id":"https://openalex.org/I39804081","display_name":"Sorbonne Universit\u00e9","ror":"https://ror.org/02en5vm52","country_code":"FR","type":"education","lineage":["https://openalex.org/I39804081"]},{"id":"https://openalex.org/I98910050","display_name":"ESPCI Paris","ror":"https://ror.org/03zx86w41","country_code":"FR","type":"education","lineage":["https://openalex.org/I190752583","https://openalex.org/I2746051580","https://openalex.org/I98910050"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Bruce Denby","raw_affiliation_strings":["Pierre and Marie Curie University/SIGMA laboratory, ESPCI, Paris, France"],"affiliations":[{"raw_affiliation_string":"Pierre and Marie Curie University/SIGMA laboratory, ESPCI, Paris, France","institution_ids":["https://openalex.org/I39804081","https://openalex.org/I98910050"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5003547455"],"corresponding_institution_ids":["https://openalex.org/I39804081","https://openalex.org/I4210142324","https://openalex.org/I86175216","https://openalex.org/I98910050"],"apc_list":{"value":2490,"currency":"EUR","value_usd":3090},"apc_paid":{"value":2490,"currency":"EUR","value_usd":3090},"fwci":1.2768,"has_fulltext":true,"cited_by_count":16,"citation_normalized_percentile":{"value":0.80057397,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"78","issue":"2","first_page":"147","last_page":"154"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8300997018814087},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7428123354911804},{"id":"https://openalex.org/keywords/software-defined-radio","display_name":"Software-defined radio","score":0.695294201374054},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.5104881525039673},{"id":"https://openalex.org/keywords/sampling","display_name":"Sampling (signal processing)","score":0.5006144046783447},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4718596637248993},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.46720239520072937},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.46617794036865234},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.4330722689628601},{"id":"https://openalex.org/keywords/converters","display_name":"Converters","score":0.4237518906593323},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.1889978051185608},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.15532228350639343},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14072659611701965},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11727908253669739},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.10493150353431702}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8300997018814087},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7428123354911804},{"id":"https://openalex.org/C171115542","wikidata":"https://www.wikidata.org/wiki/Q1331892","display_name":"Software-defined radio","level":2,"score":0.695294201374054},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5104881525039673},{"id":"https://openalex.org/C140779682","wikidata":"https://www.wikidata.org/wiki/Q210868","display_name":"Sampling (signal processing)","level":3,"score":0.5006144046783447},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4718596637248993},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.46720239520072937},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.46617794036865234},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.4330722689628601},{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.4237518906593323},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.1889978051185608},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.15532228350639343},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14072659611701965},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11727908253669739},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.10493150353431702},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1007/s11265-013-0840-5","is_oa":true,"landing_page_url":"https://doi.org/10.1007/s11265-013-0840-5","pdf_url":"https://link.springer.com/content/pdf/10.1007/s11265-013-0840-5.pdf","source":{"id":"https://openalex.org/S11258463","display_name":"Journal of Signal Processing Systems","issn_l":"1939-8018","issn":["1939-8018","1939-8115"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Signal Processing Systems","raw_type":"journal-article"},{"id":"pmh:oai:HAL:hal-01114032v1","is_oa":false,"landing_page_url":"https://hal.science/hal-01114032","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, 2015, 78 (2), pp.147-154. &#x27E8;10.1007/s11265-013-0840-5&#x27E9;","raw_type":"Journal articles"}],"best_oa_location":{"id":"doi:10.1007/s11265-013-0840-5","is_oa":true,"landing_page_url":"https://doi.org/10.1007/s11265-013-0840-5","pdf_url":"https://link.springer.com/content/pdf/10.1007/s11265-013-0840-5.pdf","source":{"id":"https://openalex.org/S11258463","display_name":"Journal of Signal Processing Systems","issn_l":"1939-8018","issn":["1939-8018","1939-8115"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Signal Processing Systems","raw_type":"journal-article"},"sustainable_development_goals":[{"display_name":"Decent work and economic growth","score":0.4099999964237213,"id":"https://metadata.un.org/sdg/8"}],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2051258777.pdf","grobid_xml":"https://content.openalex.org/works/W2051258777.grobid-xml"},"referenced_works_count":26,"referenced_works":["https://openalex.org/W192914847","https://openalex.org/W288335806","https://openalex.org/W326883504","https://openalex.org/W1535749512","https://openalex.org/W1571597719","https://openalex.org/W1766888123","https://openalex.org/W1876018024","https://openalex.org/W1966199953","https://openalex.org/W2028151381","https://openalex.org/W2067140079","https://openalex.org/W2068954979","https://openalex.org/W2077164170","https://openalex.org/W2091540260","https://openalex.org/W2100024394","https://openalex.org/W2111460811","https://openalex.org/W2114811723","https://openalex.org/W2130327609","https://openalex.org/W2149394448","https://openalex.org/W2160502247","https://openalex.org/W2161660226","https://openalex.org/W2164674414","https://openalex.org/W2169841252","https://openalex.org/W2172276307","https://openalex.org/W2184902579","https://openalex.org/W2478884216","https://openalex.org/W3151033443"],"related_works":["https://openalex.org/W631083485","https://openalex.org/W4313452936","https://openalex.org/W2097026685","https://openalex.org/W2480068220","https://openalex.org/W2102542442","https://openalex.org/W1986220761","https://openalex.org/W2070883797","https://openalex.org/W2042495646","https://openalex.org/W4386859288","https://openalex.org/W2169811953"],"abstract_inverted_index":{"Many":[0],"digital":[1],"systems":[2],"for":[3,67,82,119,132],"telecommunications":[4],"are":[5,128],"implemented":[6,18],"via":[7],"the":[8,25,28,73,104],"Software":[9,83],"Defined":[10,84],"Radio":[11,85],"technique":[12],"today.":[13],"In":[14],"such":[15],"systems,":[16],"digitally":[17],"modules":[19],"to":[20,76,91],"interface":[21,102],"analog-to-digital":[22],"converters":[23],"with":[24],"rest":[26],"of":[27,70],"system":[29],"working":[30],"at":[31],"a":[32,61,99],"different":[33],"clock":[34,108],"rate":[35],"can":[36,51],"be":[37,52],"required.":[38],"When":[39],"implementing":[40],"these":[41],"modules,":[42],"generated":[43],"spurious":[44],"harmonics":[45],"and":[46,106,125],"limited":[47],"hardware":[48],"resource":[49],"problems":[50],"critical":[53],"factors":[54],"in":[55,72],"embedded":[56],"applications.":[57,86],"The":[58,87],"article":[59],"describes":[60],"Field-Programmable":[62],"Gate":[63],"Array":[64],"(FPGA)":[65],"circuit":[66],"arbitrary-ratio":[68],"re-sampling":[69],"signals":[71],"Low":[74],"Frequency":[75,79],"Very":[77],"High":[78],"bands,":[80],"intended":[81],"proposed":[88],"resampler":[89],"allows":[90],"control":[92],"Spurious":[93],"Free":[94],"Dynamic":[95],"Range":[96],"while":[97],"providing":[98],"simple,":[100],"practical":[101],"between":[103],"input":[105],"output":[107],"domains":[109],"that":[110],"requires":[111],"no":[112],"additional":[113],"clock,":[114],"thus":[115],"making":[116],"it":[117],"appropriate":[118],"FPGA":[120,133],"clock-limited":[121],"designs.":[122],"Both":[123],"up-sampling":[124],"down-sampling":[126],"variants":[127],"presented.":[129],"Resource":[130],"utilization":[131],"implementations":[134],"is":[135],"also":[136],"discussed.":[137]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
