{"id":"https://openalex.org/W2126177875","doi":"https://doi.org/10.1007/s11265-010-0562-x","title":"Rapid Synthesis and Simulation of Computational Circuits in an MPPA","display_name":"Rapid Synthesis and Simulation of Computational Circuits in an MPPA","publication_year":2010,"publication_date":"2010-12-15","ids":{"openalex":"https://openalex.org/W2126177875","doi":"https://doi.org/10.1007/s11265-010-0562-x","mag":"2126177875"},"language":"en","primary_location":{"id":"doi:10.1007/s11265-010-0562-x","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s11265-010-0562-x","pdf_url":null,"source":{"id":"https://openalex.org/S11258463","display_name":"Journal of Signal Processing Systems","issn_l":"1939-8018","issn":["1939-8018","1939-8115"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Signal Processing Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5037520794","display_name":"David Grant","orcid":"https://orcid.org/0000-0003-4584-1498"},"institutions":[{"id":"https://openalex.org/I141945490","display_name":"University of British Columbia","ror":"https://ror.org/03rmrcq20","country_code":"CA","type":"education","lineage":["https://openalex.org/I141945490"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"David Grant","raw_affiliation_strings":["University of British Columbia, 2332 Main Mall, Vancouver, BC, Canada, V6T 1Z4","University of British Columbia, 2332 Main Mall, Vancouver, Canada V6T 1Z4"],"affiliations":[{"raw_affiliation_string":"University of British Columbia, 2332 Main Mall, Vancouver, BC, Canada, V6T 1Z4","institution_ids":["https://openalex.org/I141945490"]},{"raw_affiliation_string":"University of British Columbia, 2332 Main Mall, Vancouver, Canada V6T 1Z4","institution_ids":["https://openalex.org/I141945490"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039472611","display_name":"G. Smecher","orcid":"https://orcid.org/0000-0002-5560-187X"},"institutions":[{"id":"https://openalex.org/I141945490","display_name":"University of British Columbia","ror":"https://ror.org/03rmrcq20","country_code":"CA","type":"education","lineage":["https://openalex.org/I141945490"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Graeme Smecher","raw_affiliation_strings":["University of British Columbia, 2332 Main Mall, Vancouver, BC, Canada, V6T 1Z4","University of British Columbia, 2332 Main Mall, Vancouver, Canada V6T 1Z4"],"affiliations":[{"raw_affiliation_string":"University of British Columbia, 2332 Main Mall, Vancouver, BC, Canada, V6T 1Z4","institution_ids":["https://openalex.org/I141945490"]},{"raw_affiliation_string":"University of British Columbia, 2332 Main Mall, Vancouver, Canada V6T 1Z4","institution_ids":["https://openalex.org/I141945490"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071113717","display_name":"Guy Lemieux","orcid":"https://orcid.org/0000-0002-7924-8695"},"institutions":[{"id":"https://openalex.org/I141945490","display_name":"University of British Columbia","ror":"https://ror.org/03rmrcq20","country_code":"CA","type":"education","lineage":["https://openalex.org/I141945490"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Guy G. F. Lemieux","raw_affiliation_strings":["University of British Columbia, 2332 Main Mall, Vancouver, BC, Canada, V6T 1Z4","University of British Columbia, 2332 Main Mall, Vancouver, Canada V6T 1Z4"],"affiliations":[{"raw_affiliation_string":"University of British Columbia, 2332 Main Mall, Vancouver, BC, Canada, V6T 1Z4","institution_ids":["https://openalex.org/I141945490"]},{"raw_affiliation_string":"University of British Columbia, 2332 Main Mall, Vancouver, Canada V6T 1Z4","institution_ids":["https://openalex.org/I141945490"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5112201683","display_name":"Rosemary Francis","orcid":null},"institutions":[{"id":"https://openalex.org/I241749","display_name":"University of Cambridge","ror":"https://ror.org/013meh722","country_code":"GB","type":"education","lineage":["https://openalex.org/I241749"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Rosemary Francis","raw_affiliation_strings":["University of Cambridge, 15 JJ Thomson Avenue, Cambridge, CB3 0FD, UK","Univ. Of Cambridge, UK"],"affiliations":[{"raw_affiliation_string":"University of Cambridge, 15 JJ Thomson Avenue, Cambridge, CB3 0FD, UK","institution_ids":["https://openalex.org/I241749"]},{"raw_affiliation_string":"Univ. Of Cambridge, UK","institution_ids":["https://openalex.org/I241749"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5037520794"],"corresponding_institution_ids":["https://openalex.org/I141945490"],"apc_list":{"value":2490,"currency":"EUR","value_usd":3090},"apc_paid":null,"fwci":0.7581,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.74560506,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"67","issue":"1","first_page":"47","last_page":"63"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.8608138561248779},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7827800512313843},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7188396453857422},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.6676696538925171},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5671374797821045},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.5637607574462891},{"id":"https://openalex.org/keywords/massively-parallel","display_name":"Massively parallel","score":0.5584709048271179},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5556641221046448},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5438232421875},{"id":"https://openalex.org/keywords/range","display_name":"Range (aeronautics)","score":0.4323859214782715},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.4119235873222351},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.41007715463638306},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3477572798728943},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.34522339701652527},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3085964322090149},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.08254075050354004}],"concepts":[{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.8608138561248779},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7827800512313843},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7188396453857422},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.6676696538925171},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5671374797821045},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.5637607574462891},{"id":"https://openalex.org/C190475519","wikidata":"https://www.wikidata.org/wiki/Q544384","display_name":"Massively parallel","level":2,"score":0.5584709048271179},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5556641221046448},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5438232421875},{"id":"https://openalex.org/C204323151","wikidata":"https://www.wikidata.org/wiki/Q905424","display_name":"Range (aeronautics)","level":2,"score":0.4323859214782715},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.4119235873222351},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.41007715463638306},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3477572798728943},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.34522339701652527},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3085964322090149},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.08254075050354004},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C146978453","wikidata":"https://www.wikidata.org/wiki/Q3798668","display_name":"Aerospace engineering","level":1,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1007/s11265-010-0562-x","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s11265-010-0562-x","pdf_url":null,"source":{"id":"https://openalex.org/S11258463","display_name":"Journal of Signal Processing Systems","issn_l":"1939-8018","issn":["1939-8018","1939-8115"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Signal Processing Systems","raw_type":"journal-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.380.511","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.380.511","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.ece.ubc.ca/~lemieux/publications/grant-fpt2009.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5799999833106995,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320310709","display_name":"CMC Microsystems","ror":"https://ror.org/03k70ea39"},{"id":"https://openalex.org/F4320334593","display_name":"Natural Sciences and Engineering Research Council of Canada","ror":"https://ror.org/01h531d29"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":36,"referenced_works":["https://openalex.org/W31193308","https://openalex.org/W105298322","https://openalex.org/W1499156209","https://openalex.org/W1545343273","https://openalex.org/W1587436805","https://openalex.org/W1830708738","https://openalex.org/W1887556625","https://openalex.org/W1975624946","https://openalex.org/W2014693361","https://openalex.org/W2075943092","https://openalex.org/W2078174680","https://openalex.org/W2086889049","https://openalex.org/W2094806828","https://openalex.org/W2098077574","https://openalex.org/W2116976990","https://openalex.org/W2122992089","https://openalex.org/W2128239317","https://openalex.org/W2136054166","https://openalex.org/W2137570657","https://openalex.org/W2137693161","https://openalex.org/W2139637699","https://openalex.org/W2141709551","https://openalex.org/W2147497453","https://openalex.org/W2152247556","https://openalex.org/W2152872804","https://openalex.org/W2153972642","https://openalex.org/W2155560344","https://openalex.org/W2158827309","https://openalex.org/W2166289398","https://openalex.org/W2169446136","https://openalex.org/W2171182892","https://openalex.org/W3143415754","https://openalex.org/W3143533263","https://openalex.org/W4233502411","https://openalex.org/W4234479839","https://openalex.org/W4250192995"],"related_works":["https://openalex.org/W2470589840","https://openalex.org/W1572543472","https://openalex.org/W2370911386","https://openalex.org/W3197018050","https://openalex.org/W1975010174","https://openalex.org/W2091330445","https://openalex.org/W1595151633","https://openalex.org/W4308084229","https://openalex.org/W2376977248","https://openalex.org/W2122279357"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}