{"id":"https://openalex.org/W2029891867","doi":"https://doi.org/10.1007/s11265-006-7512-7","title":"Reconfigurable Coprocessor for Multimedia Application Domain","display_name":"Reconfigurable Coprocessor for Multimedia Application Domain","publication_year":2006,"publication_date":"2006-05-27","ids":{"openalex":"https://openalex.org/W2029891867","doi":"https://doi.org/10.1007/s11265-006-7512-7","mag":"2029891867"},"language":"en","primary_location":{"id":"doi:10.1007/s11265-006-7512-7","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s11265-006-7512-7","pdf_url":null,"source":{"id":"https://openalex.org/S4210233059","display_name":"The Journal of VLSI Signal Processing Systems for Signal Image and Video Technology","issn_l":"0922-5773","issn":["0922-5773","1573-109X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of VLSI signal processing systems for signal, image and video technology","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5069275031","display_name":"Salvatore Carta","orcid":"https://orcid.org/0000-0001-9481-511X"},"institutions":[{"id":"https://openalex.org/I172446870","display_name":"University of Cagliari","ror":"https://ror.org/003109y17","country_code":"IT","type":"education","lineage":["https://openalex.org/I172446870"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Salvatore M. Carta","raw_affiliation_strings":["DMI\u2014Department of Mathematics and Computer Science, Palazzo delle Scienze, University of Cagliari, Via Ospedale 72, 09124, Cagliari, Italy","DMI\u2014University of Cagliari, Palazzo delle Scienze, Via Ospedale, 72, 09124, Cagliari, Italy","DMI\u2014University of Cagliari, Palazzo delle Scienze, Cagliari, Italy","DMI\u2014Department of Mathematics and Computer Science, Palazzo delle Scienze, University of Cagliari, Cagliari, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"DMI\u2014Department of Mathematics and Computer Science, Palazzo delle Scienze, University of Cagliari, Via Ospedale 72, 09124, Cagliari, Italy","institution_ids":["https://openalex.org/I172446870"]},{"raw_affiliation_string":"DMI\u2014University of Cagliari, Palazzo delle Scienze, Via Ospedale, 72, 09124, Cagliari, Italy","institution_ids":["https://openalex.org/I172446870"]},{"raw_affiliation_string":"DMI\u2014University of Cagliari, Palazzo delle Scienze, Cagliari, Italy","institution_ids":["https://openalex.org/I172446870"]},{"raw_affiliation_string":"DMI\u2014Department of Mathematics and Computer Science, Palazzo delle Scienze, University of Cagliari, Cagliari, Italy","institution_ids":["https://openalex.org/I172446870"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029192066","display_name":"Danilo Pani","orcid":"https://orcid.org/0000-0003-1924-0875"},"institutions":[{"id":"https://openalex.org/I172446870","display_name":"University of Cagliari","ror":"https://ror.org/003109y17","country_code":"IT","type":"education","lineage":["https://openalex.org/I172446870"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Danilo Pani","raw_affiliation_strings":["DIEE\u2014Department of Electrical and Electronic Engineering, University of Cagliari, P.zza d\u2019Armi, 09123, Cagliari, Italy","DIEE\u2014Department of Electrical and Electronic Engineering, University of Cagliari, Cagliari, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"DIEE\u2014Department of Electrical and Electronic Engineering, University of Cagliari, P.zza d\u2019Armi, 09123, Cagliari, Italy","institution_ids":["https://openalex.org/I172446870"]},{"raw_affiliation_string":"DIEE\u2014Department of Electrical and Electronic Engineering, University of Cagliari, Cagliari, Italy","institution_ids":["https://openalex.org/I172446870"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5007761671","display_name":"Luigi Raffo","orcid":"https://orcid.org/0000-0001-9683-009X"},"institutions":[{"id":"https://openalex.org/I172446870","display_name":"University of Cagliari","ror":"https://ror.org/003109y17","country_code":"IT","type":"education","lineage":["https://openalex.org/I172446870"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Luigi Raffo","raw_affiliation_strings":["DIEE\u2014Department of Electrical and Electronic Engineering, University of Cagliari, P.zza d\u2019Armi, 09123, Cagliari, Italy","INFM-S3, Italy","DIEE\u2014Department of Electrical and Electronic Engineering, University of Cagliari, Cagliari, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"DIEE\u2014Department of Electrical and Electronic Engineering, University of Cagliari, P.zza d\u2019Armi, 09123, Cagliari, Italy","institution_ids":["https://openalex.org/I172446870"]},{"raw_affiliation_string":"INFM-S3, Italy","institution_ids":[]},{"raw_affiliation_string":"DIEE\u2014Department of Electrical and Electronic Engineering, University of Cagliari, Cagliari, Italy","institution_ids":["https://openalex.org/I172446870"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5069275031"],"corresponding_institution_ids":["https://openalex.org/I172446870"],"apc_list":null,"apc_paid":null,"fwci":1.4183,"has_fulltext":false,"cited_by_count":21,"citation_normalized_percentile":{"value":0.83790576,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"44","issue":"1-2","first_page":"135","last_page":"152"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/datapath","display_name":"Datapath","score":0.9742600917816162},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7738361358642578},{"id":"https://openalex.org/keywords/coprocessor","display_name":"Coprocessor","score":0.7045769691467285},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.5874828100204468},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5730286836624146},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.5417431592941284},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.5276806950569153},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5055828094482422},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.47054368257522583},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.44563180208206177},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4413285255432129},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.39912712574005127},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3746523857116699},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.08084821701049805}],"concepts":[{"id":"https://openalex.org/C2781198647","wikidata":"https://www.wikidata.org/wiki/Q1633673","display_name":"Datapath","level":2,"score":0.9742600917816162},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7738361358642578},{"id":"https://openalex.org/C86111242","wikidata":"https://www.wikidata.org/wiki/Q859595","display_name":"Coprocessor","level":2,"score":0.7045769691467285},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.5874828100204468},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5730286836624146},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.5417431592941284},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.5276806950569153},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5055828094482422},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.47054368257522583},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.44563180208206177},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4413285255432129},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.39912712574005127},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3746523857116699},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.08084821701049805},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1007/s11265-006-7512-7","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s11265-006-7512-7","pdf_url":null,"source":{"id":"https://openalex.org/S4210233059","display_name":"The Journal of VLSI Signal Processing Systems for Signal Image and Video Technology","issn_l":"0922-5773","issn":["0922-5773","1573-109X"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of VLSI signal processing systems for signal, image and video technology","raw_type":"journal-article"},{"id":"pmh:oai:iris.unica.it:11584/110416","is_oa":false,"landing_page_url":"http://hdl.handle.net/11584/110416","pdf_url":null,"source":{"id":"https://openalex.org/S4377196293","display_name":"UNICA IRIS Institutional Research Information System (University of Cagliari)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I172446870","host_organization_name":"University of Cagliari","host_organization_lineage":["https://openalex.org/I172446870"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W286049110","https://openalex.org/W1490336731","https://openalex.org/W1491440293","https://openalex.org/W1560250191","https://openalex.org/W1581603269","https://openalex.org/W1588354251","https://openalex.org/W1885706698","https://openalex.org/W2025787141","https://openalex.org/W2083868341","https://openalex.org/W2104449965","https://openalex.org/W2115294662","https://openalex.org/W2117285153","https://openalex.org/W2122992089","https://openalex.org/W2130227050","https://openalex.org/W2137570657","https://openalex.org/W2163298894","https://openalex.org/W2420843116","https://openalex.org/W2896839916","https://openalex.org/W3143533263","https://openalex.org/W3151364205","https://openalex.org/W4234479839","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W2109699519","https://openalex.org/W2006568360","https://openalex.org/W970262775","https://openalex.org/W2011126872","https://openalex.org/W4243317220","https://openalex.org/W2543652041","https://openalex.org/W1959467282","https://openalex.org/W2575957503","https://openalex.org/W2029891867","https://openalex.org/W910900998"],"abstract_inverted_index":null,"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":5},{"year":2014,"cited_by_count":4},{"year":2012,"cited_by_count":2}],"updated_date":"2026-07-22T07:51:19.307946","created_date":"2025-10-10T00:00:00"}