{"id":"https://openalex.org/W1964748485","doi":"https://doi.org/10.1007/s10836-012-5324-1","title":"A Built-in Self-Test Scheme for Memory Interfaces Timing Test and Measurement","display_name":"A Built-in Self-Test Scheme for Memory Interfaces Timing Test and Measurement","publication_year":2012,"publication_date":"2012-09-06","ids":{"openalex":"https://openalex.org/W1964748485","doi":"https://doi.org/10.1007/s10836-012-5324-1","mag":"1964748485"},"language":"en","primary_location":{"id":"doi:10.1007/s10836-012-5324-1","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s10836-012-5324-1","pdf_url":null,"source":{"id":"https://openalex.org/S200807567","display_name":"Journal of Electronic Testing","issn_l":"0923-8174","issn":["0923-8174","1573-0727"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Electronic Testing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100322412","display_name":"Hyun Jin Kim","orcid":"https://orcid.org/0000-0001-8400-3222"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Hyun Jin Kim","raw_affiliation_strings":["Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, TX, USA","The University of Texas, at Austin"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]},{"raw_affiliation_string":"The University of Texas, at Austin","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068070739","display_name":"Jacob A. Abraham","orcid":"https://orcid.org/0000-0002-5336-5631"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jacob A. Abraham","raw_affiliation_strings":["Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, TX, USA","The University of Texas, at Austin"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]},{"raw_affiliation_string":"The University of Texas, at Austin","institution_ids":["https://openalex.org/I86519309"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5100322412"],"corresponding_institution_ids":["https://openalex.org/I86519309"],"apc_list":{"value":2390,"currency":"EUR","value_usd":2990},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.05282365,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":"28","issue":"5","first_page":"585","last_page":"597"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.818616509437561},{"id":"https://openalex.org/keywords/testability","display_name":"Testability","score":0.5545753240585327},{"id":"https://openalex.org/keywords/digital-pattern-generator","display_name":"Digital pattern generator","score":0.5453954339027405},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4919590651988983},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4885607659816742},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4729295074939728},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.47289812564849854},{"id":"https://openalex.org/keywords/measure","display_name":"Measure (data warehouse)","score":0.4717101752758026},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.46472010016441345},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.42528027296066284},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.41866952180862427},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.28038984537124634},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.1276147961616516},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.08150303363800049}],"concepts":[{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.818616509437561},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.5545753240585327},{"id":"https://openalex.org/C151346624","wikidata":"https://www.wikidata.org/wiki/Q5276129","display_name":"Digital pattern generator","level":3,"score":0.5453954339027405},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4919590651988983},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4885607659816742},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4729295074939728},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.47289812564849854},{"id":"https://openalex.org/C2780009758","wikidata":"https://www.wikidata.org/wiki/Q6804172","display_name":"Measure (data warehouse)","level":2,"score":0.4717101752758026},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.46472010016441345},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.42528027296066284},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.41866952180862427},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.28038984537124634},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.1276147961616516},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.08150303363800049},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/s10836-012-5324-1","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s10836-012-5324-1","pdf_url":null,"source":{"id":"https://openalex.org/S200807567","display_name":"Journal of Electronic Testing","issn_l":"0923-8174","issn":["0923-8174","1573-0727"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Electronic Testing","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1544623790","https://openalex.org/W1564226936","https://openalex.org/W1597620877","https://openalex.org/W1604221342","https://openalex.org/W1973451521","https://openalex.org/W1978197409","https://openalex.org/W2013478191","https://openalex.org/W2066013911","https://openalex.org/W2098502421","https://openalex.org/W2109769819","https://openalex.org/W2129147891","https://openalex.org/W2149287920","https://openalex.org/W2149364102","https://openalex.org/W2162539355","https://openalex.org/W2164333395"],"related_works":["https://openalex.org/W82064772","https://openalex.org/W4245595174","https://openalex.org/W2394143195","https://openalex.org/W2115513740","https://openalex.org/W2539511314","https://openalex.org/W2075985769","https://openalex.org/W2463482348","https://openalex.org/W1996478429","https://openalex.org/W2157130998","https://openalex.org/W2157122227"],"abstract_inverted_index":null,"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
