{"id":"https://openalex.org/W2031265978","doi":"https://doi.org/10.1007/s10836-008-5062-6","title":"A New Scan Architecture for Both Low Power Testing and Test Volume Compression Under SOC Test Environment","display_name":"A New Scan Architecture for Both Low Power Testing and Test Volume Compression Under SOC Test Environment","publication_year":2008,"publication_date":"2008-01-17","ids":{"openalex":"https://openalex.org/W2031265978","doi":"https://doi.org/10.1007/s10836-008-5062-6","mag":"2031265978"},"language":"en","primary_location":{"id":"doi:10.1007/s10836-008-5062-6","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s10836-008-5062-6","pdf_url":null,"source":{"id":"https://openalex.org/S200807567","display_name":"Journal of Electronic Testing","issn_l":"0923-8174","issn":["0923-8174","1573-0727"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Electronic Testing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101982302","display_name":"Hong\u2010Sik Kim","orcid":"https://orcid.org/0000-0003-0341-499X"},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Hong-Sik Kim","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Yonsei University, Shinchondong, Seodaemungu, Seoul, Korea","Department of Electrical and Electronic Engineering , Yonsei University , Seoul , Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Yonsei University, Shinchondong, Seodaemungu, Seoul, Korea","institution_ids":["https://openalex.org/I193775966"]},{"raw_affiliation_string":"Department of Electrical and Electronic Engineering , Yonsei University , Seoul , Korea","institution_ids":["https://openalex.org/I193775966"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068528309","display_name":"Sungho Kang","orcid":"https://orcid.org/0000-0002-7093-2095"},"institutions":[{"id":"https://openalex.org/I193775966","display_name":"Yonsei University","ror":"https://ror.org/01wjejq96","country_code":"KR","type":"education","lineage":["https://openalex.org/I193775966"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Sungho Kang","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Yonsei University, Shinchondong, Seodaemungu, Seoul, Korea","Department of Electrical and Electronic Engineering , Yonsei University , Seoul , Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Yonsei University, Shinchondong, Seodaemungu, Seoul, Korea","institution_ids":["https://openalex.org/I193775966"]},{"raw_affiliation_string":"Department of Electrical and Electronic Engineering , Yonsei University , Seoul , Korea","institution_ids":["https://openalex.org/I193775966"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5108516165","display_name":"Michael S. Hsiao","orcid":null},"institutions":[{"id":"https://openalex.org/I859038795","display_name":"Virginia Tech","ror":"https://ror.org/02smfhw86","country_code":"US","type":"education","lineage":["https://openalex.org/I859038795"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Michael S. Hsiao","raw_affiliation_strings":["Bradley Department of Electrical and Computer Engineering, Virginia Tech., Blacksburg, VA, USA","Bradley Dept. of Electrical and Computer Engineering Virginia Tech Blacksburg, USA#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Bradley Department of Electrical and Computer Engineering, Virginia Tech., Blacksburg, VA, USA","institution_ids":["https://openalex.org/I859038795"]},{"raw_affiliation_string":"Bradley Dept. of Electrical and Computer Engineering Virginia Tech Blacksburg, USA#TAB#","institution_ids":["https://openalex.org/I859038795"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5101982302"],"corresponding_institution_ids":["https://openalex.org/I193775966"],"apc_list":{"value":2990,"currency":"USD","value_usd":2990},"apc_paid":null,"fwci":1.0549,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.85696186,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"24","issue":"4","first_page":"365","last_page":"378"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.9916999936103821,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/test-compression","display_name":"Test compression","score":0.9079627990722656},{"id":"https://openalex.org/keywords/scan-chain","display_name":"Scan chain","score":0.7352861166000366},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.6478801965713501},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.6212209463119507},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4787815809249878},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4755132794380188},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.4751460552215576},{"id":"https://openalex.org/keywords/volume","display_name":"Volume (thermodynamics)","score":0.43246734142303467},{"id":"https://openalex.org/keywords/test-data","display_name":"Test data","score":0.42181113362312317},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.4171367883682251},{"id":"https://openalex.org/keywords/cube","display_name":"Cube (algebra)","score":0.41652151942253113},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.35877180099487305},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.3037872910499573},{"id":"https://openalex.org/keywords/testability","display_name":"Testability","score":0.279483437538147},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.24530422687530518},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.23413223028182983},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18441706895828247},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.13970085978507996}],"concepts":[{"id":"https://openalex.org/C29652920","wikidata":"https://www.wikidata.org/wiki/Q7705757","display_name":"Test compression","level":4,"score":0.9079627990722656},{"id":"https://openalex.org/C150012182","wikidata":"https://www.wikidata.org/wiki/Q225990","display_name":"Scan chain","level":3,"score":0.7352861166000366},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.6478801965713501},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.6212209463119507},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4787815809249878},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4755132794380188},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.4751460552215576},{"id":"https://openalex.org/C20556612","wikidata":"https://www.wikidata.org/wiki/Q4469374","display_name":"Volume (thermodynamics)","level":2,"score":0.43246734142303467},{"id":"https://openalex.org/C16910744","wikidata":"https://www.wikidata.org/wiki/Q7705759","display_name":"Test data","level":2,"score":0.42181113362312317},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.4171367883682251},{"id":"https://openalex.org/C53051483","wikidata":"https://www.wikidata.org/wiki/Q861555","display_name":"Cube (algebra)","level":2,"score":0.41652151942253113},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.35877180099487305},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.3037872910499573},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.279483437538147},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.24530422687530518},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.23413223028182983},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18441706895828247},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.13970085978507996},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/s10836-008-5062-6","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s10836-008-5062-6","pdf_url":null,"source":{"id":"https://openalex.org/S200807567","display_name":"Journal of Electronic Testing","issn_l":"0923-8174","issn":["0923-8174","1573-0727"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Journal of Electronic Testing","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":38,"referenced_works":["https://openalex.org/W1503570386","https://openalex.org/W1554885925","https://openalex.org/W1763985980","https://openalex.org/W1867538663","https://openalex.org/W1908802429","https://openalex.org/W1980985044","https://openalex.org/W2068731843","https://openalex.org/W2080510479","https://openalex.org/W2095685963","https://openalex.org/W2096852695","https://openalex.org/W2104107023","https://openalex.org/W2104920289","https://openalex.org/W2107800433","https://openalex.org/W2108103162","https://openalex.org/W2118922141","https://openalex.org/W2119241964","https://openalex.org/W2122955150","https://openalex.org/W2126641963","https://openalex.org/W2128823151","https://openalex.org/W2129124567","https://openalex.org/W2130439920","https://openalex.org/W2131198212","https://openalex.org/W2135851981","https://openalex.org/W2138530143","https://openalex.org/W2148192154","https://openalex.org/W2148244401","https://openalex.org/W2150448461","https://openalex.org/W2152216207","https://openalex.org/W2152406824","https://openalex.org/W2157198810","https://openalex.org/W2166163625","https://openalex.org/W2171438054","https://openalex.org/W2267611016","https://openalex.org/W2284053929","https://openalex.org/W2497555727","https://openalex.org/W2888824071","https://openalex.org/W4242736882","https://openalex.org/W4249647124"],"related_works":["https://openalex.org/W2786111245","https://openalex.org/W2789883751","https://openalex.org/W2543176856","https://openalex.org/W2075356617","https://openalex.org/W2408214455","https://openalex.org/W2019719714","https://openalex.org/W2364150359","https://openalex.org/W3088373974","https://openalex.org/W2156546262","https://openalex.org/W2140015776"],"abstract_inverted_index":null,"counts_by_year":[{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2026-07-23T08:03:31.855105","created_date":"2025-10-10T00:00:00"}
