{"id":"https://openalex.org/W2062122280","doi":"https://doi.org/10.1007/s10617-012-9101-2","title":"System level modeling methodology of NoC design from UML-MARTE to VHDL","display_name":"System level modeling methodology of NoC design from UML-MARTE to VHDL","publication_year":2012,"publication_date":"2012-11-01","ids":{"openalex":"https://openalex.org/W2062122280","doi":"https://doi.org/10.1007/s10617-012-9101-2","mag":"2062122280"},"language":"en","primary_location":{"id":"doi:10.1007/s10617-012-9101-2","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s10617-012-9101-2","pdf_url":null,"source":{"id":"https://openalex.org/S85498321","display_name":"Design Automation for Embedded Systems","issn_l":"0929-5585","issn":["0929-5585","1572-8080"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Design Automation for Embedded Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://inria.hal.science/hal-00797601","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5017538991","display_name":"Majdi Elhaji","orcid":null},"institutions":[{"id":"https://openalex.org/I166928557","display_name":"University of Monastir","ror":"https://ror.org/00nhtcg76","country_code":"TN","type":"education","lineage":["https://openalex.org/I166928557"]},{"id":"https://openalex.org/I174424907","display_name":"Laboratoire d'Informatique Fondamentale de Lille","ror":"https://ror.org/05rhg0h08","country_code":"FR","type":"facility","lineage":["https://openalex.org/I174424907"]}],"countries":["FR","TN"],"is_corresponding":true,"raw_author_name":"Majdi Elhaji","raw_affiliation_strings":["Electronics and Microelectronics Laboratory, Physics Department, Faculty of Sciences of Monastir, Monastir, Tunisia","DART - Contributions of the Data parallelism to real time (France)","E\u03bcE - Laboratoire d'Electronique et de Micro\u00e9lectronique [Monastir] (Facult\u00e9 des Sciences de Monastir 5019 Monastir - Tunisia)","LIFL - Laboratoire d'Informatique Fondamentale de Lille (B\u00e2timent M3 59655 Villeneuve d'Ascq C\u00e9dex - France)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electronics and Microelectronics Laboratory, Physics Department, Faculty of Sciences of Monastir, Monastir, Tunisia","institution_ids":["https://openalex.org/I166928557"]},{"raw_affiliation_string":"DART - Contributions of the Data parallelism to real time (France)","institution_ids":[]},{"raw_affiliation_string":"E\u03bcE - Laboratoire d'Electronique et de Micro\u00e9lectronique [Monastir] (Facult\u00e9 des Sciences de Monastir 5019 Monastir - Tunisia)","institution_ids":["https://openalex.org/I166928557"]},{"raw_affiliation_string":"LIFL - Laboratoire d'Informatique Fondamentale de Lille (B\u00e2timent M3 59655 Villeneuve d'Ascq C\u00e9dex - France)","institution_ids":["https://openalex.org/I174424907"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036031074","display_name":"Pierre Boulet","orcid":"https://orcid.org/0000-0002-0373-4478"},"institutions":[{"id":"https://openalex.org/I166928557","display_name":"University of Monastir","ror":"https://ror.org/00nhtcg76","country_code":"TN","type":"education","lineage":["https://openalex.org/I166928557"]},{"id":"https://openalex.org/I174424907","display_name":"Laboratoire d'Informatique Fondamentale de Lille","ror":"https://ror.org/05rhg0h08","country_code":"FR","type":"facility","lineage":["https://openalex.org/I174424907"]}],"countries":["FR","TN"],"is_corresponding":false,"raw_author_name":"Pierre Boulet","raw_affiliation_strings":["Electronics and Microelectronics Laboratory, Physics Department, Faculty of Sciences of Monastir, Monastir, Tunisia","LIFL - DART/\u00c9meraude (B\u00e2t. M3 Cit\u00e9 Scientifique F-59650 Villeneuve d'Ascq CEDEX France - France)","LIFL - Laboratoire d'Informatique Fondamentale de Lille (B\u00e2timent M3 59655 Villeneuve d'Ascq C\u00e9dex - France)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electronics and Microelectronics Laboratory, Physics Department, Faculty of Sciences of Monastir, Monastir, Tunisia","institution_ids":["https://openalex.org/I166928557"]},{"raw_affiliation_string":"LIFL - DART/\u00c9meraude (B\u00e2t. M3 Cit\u00e9 Scientifique F-59650 Villeneuve d'Ascq CEDEX France - France)","institution_ids":["https://openalex.org/I174424907"]},{"raw_affiliation_string":"LIFL - Laboratoire d'Informatique Fondamentale de Lille (B\u00e2timent M3 59655 Villeneuve d'Ascq C\u00e9dex - France)","institution_ids":["https://openalex.org/I174424907"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011463917","display_name":"Abdelkrim Zitouni","orcid":"https://orcid.org/0000-0001-7604-2694"},"institutions":[{"id":"https://openalex.org/I166928557","display_name":"University of Monastir","ror":"https://ror.org/00nhtcg76","country_code":"TN","type":"education","lineage":["https://openalex.org/I166928557"]}],"countries":["TN"],"is_corresponding":false,"raw_author_name":"Abdelkrim Zitouni","raw_affiliation_strings":["Electronics and Microelectronics Laboratory, Physics Department, Faculty of Sciences of Monastir, Monastir, Tunisia","E\u03bcE - Laboratoire d'Electronique et de Micro\u00e9lectronique [Monastir] (Facult\u00e9 des Sciences de Monastir 5019 Monastir - Tunisia)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electronics and Microelectronics Laboratory, Physics Department, Faculty of Sciences of Monastir, Monastir, Tunisia","institution_ids":["https://openalex.org/I166928557"]},{"raw_affiliation_string":"E\u03bcE - Laboratoire d'Electronique et de Micro\u00e9lectronique [Monastir] (Facult\u00e9 des Sciences de Monastir 5019 Monastir - Tunisia)","institution_ids":["https://openalex.org/I166928557"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110638709","display_name":"Samy Meftali","orcid":"https://orcid.org/0000-0002-0589-3042"},"institutions":[{"id":"https://openalex.org/I166928557","display_name":"University of Monastir","ror":"https://ror.org/00nhtcg76","country_code":"TN","type":"education","lineage":["https://openalex.org/I166928557"]},{"id":"https://openalex.org/I174424907","display_name":"Laboratoire d'Informatique Fondamentale de Lille","ror":"https://ror.org/05rhg0h08","country_code":"FR","type":"facility","lineage":["https://openalex.org/I174424907"]}],"countries":["FR","TN"],"is_corresponding":false,"raw_author_name":"Samy Meftali","raw_affiliation_strings":["Electronics and Microelectronics Laboratory, Physics Department, Faculty of Sciences of Monastir, Monastir, Tunisia","DART - Contributions of the Data parallelism to real time (France)","LIFL - Laboratoire d'Informatique Fondamentale de Lille (B\u00e2timent M3 59655 Villeneuve d'Ascq C\u00e9dex - France)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electronics and Microelectronics Laboratory, Physics Department, Faculty of Sciences of Monastir, Monastir, Tunisia","institution_ids":["https://openalex.org/I166928557"]},{"raw_affiliation_string":"DART - Contributions of the Data parallelism to real time (France)","institution_ids":[]},{"raw_affiliation_string":"LIFL - Laboratoire d'Informatique Fondamentale de Lille (B\u00e2timent M3 59655 Villeneuve d'Ascq C\u00e9dex - France)","institution_ids":["https://openalex.org/I174424907"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111522416","display_name":"Jean\u2010Luc Dekeyser","orcid":null},"institutions":[{"id":"https://openalex.org/I166928557","display_name":"University of Monastir","ror":"https://ror.org/00nhtcg76","country_code":"TN","type":"education","lineage":["https://openalex.org/I166928557"]},{"id":"https://openalex.org/I174424907","display_name":"Laboratoire d'Informatique Fondamentale de Lille","ror":"https://ror.org/05rhg0h08","country_code":"FR","type":"facility","lineage":["https://openalex.org/I174424907"]}],"countries":["FR","TN"],"is_corresponding":false,"raw_author_name":"Jean-Luc Dekeyser","raw_affiliation_strings":["Electronics and Microelectronics Laboratory, Physics Department, Faculty of Sciences of Monastir, Monastir, Tunisia","DART - Contributions of the Data parallelism to real time (France)","LIFL - Laboratoire d'Informatique Fondamentale de Lille (B\u00e2timent M3 59655 Villeneuve d'Ascq C\u00e9dex - France)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electronics and Microelectronics Laboratory, Physics Department, Faculty of Sciences of Monastir, Monastir, Tunisia","institution_ids":["https://openalex.org/I166928557"]},{"raw_affiliation_string":"DART - Contributions of the Data parallelism to real time (France)","institution_ids":[]},{"raw_affiliation_string":"LIFL - Laboratoire d'Informatique Fondamentale de Lille (B\u00e2timent M3 59655 Villeneuve d'Ascq C\u00e9dex - France)","institution_ids":["https://openalex.org/I174424907"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5113788610","display_name":"Rached Tourki","orcid":null},"institutions":[{"id":"https://openalex.org/I166928557","display_name":"University of Monastir","ror":"https://ror.org/00nhtcg76","country_code":"TN","type":"education","lineage":["https://openalex.org/I166928557"]}],"countries":["TN"],"is_corresponding":false,"raw_author_name":"Rached Tourki","raw_affiliation_strings":["Electronics and Microelectronics Laboratory, Physics Department, Faculty of Sciences of Monastir, Monastir, Tunisia","E\u03bcE - Laboratoire d'Electronique et de Micro\u00e9lectronique [Monastir] (Facult\u00e9 des Sciences de Monastir 5019 Monastir - Tunisia)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electronics and Microelectronics Laboratory, Physics Department, Faculty of Sciences of Monastir, Monastir, Tunisia","institution_ids":["https://openalex.org/I166928557"]},{"raw_affiliation_string":"E\u03bcE - Laboratoire d'Electronique et de Micro\u00e9lectronique [Monastir] (Facult\u00e9 des Sciences de Monastir 5019 Monastir - Tunisia)","institution_ids":["https://openalex.org/I166928557"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5017538991"],"corresponding_institution_ids":["https://openalex.org/I166928557","https://openalex.org/I174424907"],"apc_list":{"value":3190,"currency":"USD","value_usd":3190},"apc_paid":null,"fwci":1.5961,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.85829116,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":96},"biblio":{"volume":"16","issue":"4","first_page":"161","last_page":"187"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.76407790184021},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.7587189078330994},{"id":"https://openalex.org/keywords/unified-modeling-language","display_name":"Unified Modeling Language","score":0.7417200207710266},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.541819155216217},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.5349307060241699},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4792449474334717},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.43727830052375793},{"id":"https://openalex.org/keywords/modeling-language","display_name":"Modeling language","score":0.43291354179382324},{"id":"https://openalex.org/keywords/network-topology","display_name":"Network topology","score":0.4182227849960327},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.3609645366668701},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.258745014667511},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.2456117570400238},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.1862086057662964},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.08075952529907227}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.76407790184021},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.7587189078330994},{"id":"https://openalex.org/C145644426","wikidata":"https://www.wikidata.org/wiki/Q169411","display_name":"Unified Modeling Language","level":3,"score":0.7417200207710266},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.541819155216217},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.5349307060241699},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4792449474334717},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.43727830052375793},{"id":"https://openalex.org/C179603123","wikidata":"https://www.wikidata.org/wiki/Q1941921","display_name":"Modeling language","level":3,"score":0.43291354179382324},{"id":"https://openalex.org/C199845137","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Network topology","level":2,"score":0.4182227849960327},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.3609645366668701},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.258745014667511},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.2456117570400238},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.1862086057662964},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.08075952529907227}],"mesh":[],"locations_count":4,"locations":[{"id":"doi:10.1007/s10617-012-9101-2","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s10617-012-9101-2","pdf_url":null,"source":{"id":"https://openalex.org/S85498321","display_name":"Design Automation for Embedded Systems","issn_l":"0929-5585","issn":["0929-5585","1572-8080"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Design Automation for Embedded Systems","raw_type":"journal-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.653.8054","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.653.8054","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"https://hal.inria.fr/hal-00797601/document/","raw_type":"text"},{"id":"pmh:oai:HAL:hal-00797601v1","is_oa":true,"landing_page_url":"https://inria.hal.science/hal-00797601","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Design Automation for Embedded Systems, 2012, pp.1--27. ⟨10.1007/s10617-012-9101-2⟩","raw_type":"info:eu-repo/semantics/article"},{"id":"pmh:oai:lilloa.univ-lille.fr:20.500.12210/26947","is_oa":true,"landing_page_url":"http://hdl.handle.net/20.500.12210/26947","pdf_url":null,"source":{"id":"https://openalex.org/S4306402203","display_name":"LillOA (Universit\u00e9 de Lille (University Of Lille))","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4210123514","host_organization_name":"Centre d'Etudes en Civilisations, Langues et Litt\u00e9ratures Etrang\u00e8res","host_organization_lineage":["https://openalex.org/I4210123514"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":{"id":"pmh:oai:HAL:hal-00797601v1","is_oa":true,"landing_page_url":"https://inria.hal.science/hal-00797601","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Design Automation for Embedded Systems, 2012, pp.1--27. ⟨10.1007/s10617-012-9101-2⟩","raw_type":"info:eu-repo/semantics/article"},"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.6499999761581421,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":40,"referenced_works":["https://openalex.org/W206452102","https://openalex.org/W1485471458","https://openalex.org/W1488743147","https://openalex.org/W1489567316","https://openalex.org/W1517098200","https://openalex.org/W1532734816","https://openalex.org/W1546837845","https://openalex.org/W1555653009","https://openalex.org/W1561157983","https://openalex.org/W1572134249","https://openalex.org/W1614361858","https://openalex.org/W1846919312","https://openalex.org/W1965342697","https://openalex.org/W2000336625","https://openalex.org/W2015342772","https://openalex.org/W2029821990","https://openalex.org/W2036706327","https://openalex.org/W2043751890","https://openalex.org/W2081010567","https://openalex.org/W2092994466","https://openalex.org/W2118597853","https://openalex.org/W2119071763","https://openalex.org/W2123184444","https://openalex.org/W2132727849","https://openalex.org/W2146258657","https://openalex.org/W2151506756","https://openalex.org/W2151888078","https://openalex.org/W2152099665","https://openalex.org/W2160642395","https://openalex.org/W2160846021","https://openalex.org/W2217550799","https://openalex.org/W2286043311","https://openalex.org/W2481820180","https://openalex.org/W2540500304","https://openalex.org/W2607159714","https://openalex.org/W2738698644","https://openalex.org/W3144403206","https://openalex.org/W4232809066","https://openalex.org/W4247367638","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W2170113317","https://openalex.org/W2363773515","https://openalex.org/W2349592260","https://openalex.org/W2536645041","https://openalex.org/W1966557326","https://openalex.org/W2394049954","https://openalex.org/W2018862713","https://openalex.org/W2555062806","https://openalex.org/W2349724551","https://openalex.org/W2158621500"],"abstract_inverted_index":null,"counts_by_year":[{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":2}],"updated_date":"2026-07-29T09:40:50.615796","created_date":"2025-10-10T00:00:00"}