{"id":"https://openalex.org/W1983014245","doi":"https://doi.org/10.1007/s10617-008-9026-y","title":"Rethinking the synthesis of buses, data mapping, and\u00a0memory allocation for MPSoC","display_name":"Rethinking the synthesis of buses, data mapping, and\u00a0memory allocation for MPSoC","publication_year":2008,"publication_date":"2008-06-10","ids":{"openalex":"https://openalex.org/W1983014245","doi":"https://doi.org/10.1007/s10617-008-9026-y","mag":"1983014245"},"language":"en","primary_location":{"id":"doi:10.1007/s10617-008-9026-y","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s10617-008-9026-y","pdf_url":null,"source":{"id":"https://openalex.org/S85498321","display_name":"Design Automation for Embedded Systems","issn_l":"0929-5585","issn":["0929-5585","1572-8080"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Design Automation for Embedded Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5034701871","display_name":"Brett H. Meyer","orcid":"https://orcid.org/0000-0002-6650-3298"},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Brett H. Meyer","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, 15213, USA","Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, USA 15213#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, 15213, USA","institution_ids":["https://openalex.org/I74973139"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, USA 15213#TAB#","institution_ids":["https://openalex.org/I74973139"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5067313298","display_name":"Donald E. Thomas","orcid":"https://orcid.org/0000-0002-3976-3131"},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Donald E. Thomas","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, 15213, USA","Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, USA 15213#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, 15213, USA","institution_ids":["https://openalex.org/I74973139"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, USA 15213#TAB#","institution_ids":["https://openalex.org/I74973139"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5034701871"],"corresponding_institution_ids":["https://openalex.org/I74973139"],"apc_list":{"value":2490,"currency":"EUR","value_usd":3190},"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.05198338,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"13","issue":"1-2","first_page":"73","last_page":"88"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8633875846862793},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.6095852255821228},{"id":"https://openalex.org/keywords/mpsoc","display_name":"MPSoC","score":0.591174304485321},{"id":"https://openalex.org/keywords/overlay","display_name":"Overlay","score":0.5014536380767822},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.4803401231765747},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.47346702218055725},{"id":"https://openalex.org/keywords/shared-resource","display_name":"Shared resource","score":0.45906972885131836},{"id":"https://openalex.org/keywords/simulated-annealing","display_name":"Simulated annealing","score":0.43716683983802795},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.36368927359580994},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.2609158158302307},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.12364527583122253},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.10053208470344543}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8633875846862793},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.6095852255821228},{"id":"https://openalex.org/C2777187653","wikidata":"https://www.wikidata.org/wiki/Q975106","display_name":"MPSoC","level":3,"score":0.591174304485321},{"id":"https://openalex.org/C136085584","wikidata":"https://www.wikidata.org/wiki/Q910289","display_name":"Overlay","level":2,"score":0.5014536380767822},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.4803401231765747},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.47346702218055725},{"id":"https://openalex.org/C51332947","wikidata":"https://www.wikidata.org/wiki/Q1172305","display_name":"Shared resource","level":2,"score":0.45906972885131836},{"id":"https://openalex.org/C126980161","wikidata":"https://www.wikidata.org/wiki/Q863783","display_name":"Simulated annealing","level":2,"score":0.43716683983802795},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.36368927359580994},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.2609158158302307},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.12364527583122253},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.10053208470344543},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/s10617-008-9026-y","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s10617-008-9026-y","pdf_url":null,"source":{"id":"https://openalex.org/S85498321","display_name":"Design Automation for Embedded Systems","issn_l":"0929-5585","issn":["0929-5585","1572-8080"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Design Automation for Embedded Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W129209152","https://openalex.org/W1531162979","https://openalex.org/W1534637524","https://openalex.org/W1972145570","https://openalex.org/W1990775449","https://openalex.org/W2094042791","https://openalex.org/W2100520545","https://openalex.org/W2101987243","https://openalex.org/W2130156165","https://openalex.org/W2134885201","https://openalex.org/W2140603991","https://openalex.org/W2147708520","https://openalex.org/W2151937931","https://openalex.org/W2163498322","https://openalex.org/W2164703292","https://openalex.org/W2172139098","https://openalex.org/W4249224491"],"related_works":["https://openalex.org/W2348165886","https://openalex.org/W1862215007","https://openalex.org/W2003657881","https://openalex.org/W1591980797","https://openalex.org/W2120080222","https://openalex.org/W4281711577","https://openalex.org/W2178653557","https://openalex.org/W2106200299","https://openalex.org/W2994908368","https://openalex.org/W2104524790"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-06-19T15:47:20.252518","created_date":"2025-10-10T00:00:00"}