{"id":"https://openalex.org/W2887493790","doi":"https://doi.org/10.1007/s00607-018-0651-4","title":"Simulating the effects of logic faults in implementation-level VITAL-compliant models","display_name":"Simulating the effects of logic faults in implementation-level VITAL-compliant models","publication_year":2018,"publication_date":"2018-08-18","ids":{"openalex":"https://openalex.org/W2887493790","doi":"https://doi.org/10.1007/s00607-018-0651-4","mag":"2887493790"},"language":"en","primary_location":{"id":"doi:10.1007/s00607-018-0651-4","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s00607-018-0651-4","pdf_url":null,"source":{"id":"https://openalex.org/S35593046","display_name":"Computing","issn_l":"0010-485X","issn":["0010-485X","1436-5057"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Computing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://hdl.handle.net/10251/154375","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5036311498","display_name":"Ilya Tuzov","orcid":"https://orcid.org/0000-0002-1980-0708"},"institutions":[{"id":"https://openalex.org/I60053951","display_name":"Universitat Polit\u00e8cnica de Val\u00e8ncia","ror":"https://ror.org/01460j859","country_code":"ES","type":"education","lineage":["https://openalex.org/I60053951"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"Ilya Tuzov","raw_affiliation_strings":["ITACA, Universitat Polit\u00e8cnica de Val\u00e8ncia, Valencia, Spain","ITACA, Universitat Polit\u00e8cnica de Val\u00e8ncia, Campus de Vera s/n, 46022, Valencia, Spain"],"raw_orcid":"https://orcid.org/0000-0002-1980-0708","affiliations":[{"raw_affiliation_string":"ITACA, Universitat Polit\u00e8cnica de Val\u00e8ncia, Valencia, Spain","institution_ids":["https://openalex.org/I60053951"]},{"raw_affiliation_string":"ITACA, Universitat Polit\u00e8cnica de Val\u00e8ncia, Campus de Vera s/n, 46022, Valencia, Spain","institution_ids":["https://openalex.org/I60053951"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083406342","display_name":"David de Andr\u00e9s","orcid":"https://orcid.org/0000-0002-4744-3795"},"institutions":[{"id":"https://openalex.org/I60053951","display_name":"Universitat Polit\u00e8cnica de Val\u00e8ncia","ror":"https://ror.org/01460j859","country_code":"ES","type":"education","lineage":["https://openalex.org/I60053951"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"David de Andr\u00e9s","raw_affiliation_strings":["ITACA, Universitat Polit\u00e8cnica de Val\u00e8ncia, Valencia, Spain","ITACA, Universitat Polit\u00e8cnica de Val\u00e8ncia, Campus de Vera s/n, 46022, Valencia, Spain"],"raw_orcid":"https://orcid.org/0000-0002-4744-3795","affiliations":[{"raw_affiliation_string":"ITACA, Universitat Polit\u00e8cnica de Val\u00e8ncia, Valencia, Spain","institution_ids":["https://openalex.org/I60053951"]},{"raw_affiliation_string":"ITACA, Universitat Polit\u00e8cnica de Val\u00e8ncia, Campus de Vera s/n, 46022, Valencia, Spain","institution_ids":["https://openalex.org/I60053951"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5086904927","display_name":"Juan\u2013Carlos Ruiz","orcid":"https://orcid.org/0000-0001-7678-3513"},"institutions":[{"id":"https://openalex.org/I60053951","display_name":"Universitat Polit\u00e8cnica de Val\u00e8ncia","ror":"https://ror.org/01460j859","country_code":"ES","type":"education","lineage":["https://openalex.org/I60053951"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"Juan-Carlos Ruiz","raw_affiliation_strings":["ITACA, Universitat Polit\u00e8cnica de Val\u00e8ncia, Valencia, Spain","ITACA, Universitat Polit\u00e8cnica de Val\u00e8ncia, Campus de Vera s/n, 46022, Valencia, Spain"],"raw_orcid":"https://orcid.org/0000-0001-7678-3513","affiliations":[{"raw_affiliation_string":"ITACA, Universitat Polit\u00e8cnica de Val\u00e8ncia, Valencia, Spain","institution_ids":["https://openalex.org/I60053951"]},{"raw_affiliation_string":"ITACA, Universitat Polit\u00e8cnica de Val\u00e8ncia, Campus de Vera s/n, 46022, Valencia, Spain","institution_ids":["https://openalex.org/I60053951"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5036311498","https://openalex.org/A5083406342","https://openalex.org/A5086904927"],"corresponding_institution_ids":["https://openalex.org/I60053951"],"apc_list":{"value":2290,"currency":"EUR","value_usd":2890},"apc_paid":null,"fwci":0.0,"has_fulltext":true,"cited_by_count":0,"citation_normalized_percentile":{"value":0.07697687,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"101","issue":"2","first_page":"77","last_page":"96"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/toolchain","display_name":"Toolchain","score":0.7337349653244019},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6896073818206787},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.6741292476654053},{"id":"https://openalex.org/keywords/dependability","display_name":"Dependability","score":0.6422534584999084},{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness (evolution)","score":0.5292755365371704},{"id":"https://openalex.org/keywords/fault-injection","display_name":"Fault injection","score":0.5267221927642822},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5237317681312561},{"id":"https://openalex.org/keywords/interoperability","display_name":"Interoperability","score":0.4385855793952942},{"id":"https://openalex.org/keywords/hardware-description-language","display_name":"Hardware description language","score":0.4372679591178894},{"id":"https://openalex.org/keywords/register-transfer-level","display_name":"Register-transfer level","score":0.4246291518211365},{"id":"https://openalex.org/keywords/logic-simulation","display_name":"Logic simulation","score":0.4110873341560364},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.39264926314353943},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.3635063171386719},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.3533375561237335},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.3125714063644409},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.2688939571380615},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.21695703268051147},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18000471591949463},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.1707029938697815},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.1670982837677002},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.11558070778846741},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.09643921256065369}],"concepts":[{"id":"https://openalex.org/C2777062904","wikidata":"https://www.wikidata.org/wiki/Q545406","display_name":"Toolchain","level":3,"score":0.7337349653244019},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6896073818206787},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.6741292476654053},{"id":"https://openalex.org/C77019957","wikidata":"https://www.wikidata.org/wiki/Q2689057","display_name":"Dependability","level":2,"score":0.6422534584999084},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.5292755365371704},{"id":"https://openalex.org/C2775928411","wikidata":"https://www.wikidata.org/wiki/Q2041312","display_name":"Fault injection","level":3,"score":0.5267221927642822},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5237317681312561},{"id":"https://openalex.org/C20136886","wikidata":"https://www.wikidata.org/wiki/Q749647","display_name":"Interoperability","level":2,"score":0.4385855793952942},{"id":"https://openalex.org/C42143788","wikidata":"https://www.wikidata.org/wiki/Q173341","display_name":"Hardware description language","level":3,"score":0.4372679591178894},{"id":"https://openalex.org/C34854456","wikidata":"https://www.wikidata.org/wiki/Q1484552","display_name":"Register-transfer level","level":4,"score":0.4246291518211365},{"id":"https://openalex.org/C64859876","wikidata":"https://www.wikidata.org/wiki/Q173673","display_name":"Logic simulation","level":3,"score":0.4110873341560364},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.39264926314353943},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.3635063171386719},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.3533375561237335},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.3125714063644409},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.2688939571380615},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.21695703268051147},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18000471591949463},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.1707029938697815},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.1670982837677002},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.11558070778846741},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.09643921256065369},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1007/s00607-018-0651-4","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s00607-018-0651-4","pdf_url":null,"source":{"id":"https://openalex.org/S35593046","display_name":"Computing","issn_l":"0010-485X","issn":["0010-485X","1436-5057"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Computing","raw_type":"journal-article"},{"id":"pmh:oai:riunet.upv.es:10251/154375","is_oa":true,"landing_page_url":"http://hdl.handle.net/10251/154375","pdf_url":null,"source":{"id":"https://openalex.org/S4306401500","display_name":"RiuNet (Politechnical University of Valencia)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I60053951","host_organization_name":"Universitat Polit\u00e8cnica de Val\u00e8ncia","host_organization_lineage":["https://openalex.org/I60053951"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":{"id":"pmh:oai:riunet.upv.es:10251/154375","is_oa":true,"landing_page_url":"http://hdl.handle.net/10251/154375","pdf_url":null,"source":{"id":"https://openalex.org/S4306401500","display_name":"RiuNet (Politechnical University of Valencia)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I60053951","host_organization_name":"Universitat Polit\u00e8cnica de Val\u00e8ncia","host_organization_lineage":["https://openalex.org/I60053951"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/article"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.47999998927116394,"display_name":"Industry, innovation and infrastructure"}],"awards":[{"id":"https://openalex.org/G1345478019","display_name":null,"funder_award_id":"TIN2016-81075-R","funder_id":"https://openalex.org/F4320326262","funder_display_name":"Ministerio de Asuntos Econ\u00f3micos y Transformaci\u00f3n Digital, Gobierno de Espa\u00f1a"}],"funders":[{"id":"https://openalex.org/F4320326262","display_name":"Ministerio de Asuntos Econ\u00f3micos y Transformaci\u00f3n Digital, Gobierno de Espa\u00f1a","ror":"https://ror.org/03sv46s19"},{"id":"https://openalex.org/F4320334905","display_name":"Universitat Polit\u00e8cnica de Val\u00e8ncia","ror":"https://ror.org/01460j859"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":26,"referenced_works":["https://openalex.org/W581518716","https://openalex.org/W633709461","https://openalex.org/W1500537545","https://openalex.org/W1517105504","https://openalex.org/W1534153049","https://openalex.org/W1686420892","https://openalex.org/W1993058522","https://openalex.org/W2028687031","https://openalex.org/W2049694450","https://openalex.org/W2062716389","https://openalex.org/W2087825164","https://openalex.org/W2098513789","https://openalex.org/W2102673752","https://openalex.org/W2103107793","https://openalex.org/W2107822077","https://openalex.org/W2135577965","https://openalex.org/W2158757623","https://openalex.org/W2544282520","https://openalex.org/W2608179785","https://openalex.org/W2751576273","https://openalex.org/W2774266222","https://openalex.org/W2883521036","https://openalex.org/W3209087990","https://openalex.org/W4232751114","https://openalex.org/W4235799760","https://openalex.org/W4238785513"],"related_works":["https://openalex.org/W4301367282","https://openalex.org/W4317382974","https://openalex.org/W2220641111","https://openalex.org/W2166027382","https://openalex.org/W2141004294","https://openalex.org/W1494561250","https://openalex.org/W2106530713","https://openalex.org/W3141551763","https://openalex.org/W2095055225","https://openalex.org/W1554653810"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2026-06-15T08:34:33.830935","created_date":"2025-10-10T00:00:00"}