{"id":"https://openalex.org/W1963958818","doi":"https://doi.org/10.1007/s00450-012-0209-1","title":"Performance characterization of data-intensive kernels on AMD Fusion architectures","display_name":"Performance characterization of data-intensive kernels on AMD Fusion architectures","publication_year":2012,"publication_date":"2012-05-22","ids":{"openalex":"https://openalex.org/W1963958818","doi":"https://doi.org/10.1007/s00450-012-0209-1","mag":"1963958818"},"language":"en","primary_location":{"id":"doi:10.1007/s00450-012-0209-1","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s00450-012-0209-1","pdf_url":null,"source":{"id":"https://openalex.org/S22130598","display_name":"Computer Science - Research and Development","issn_l":"1865-2034","issn":["1865-2034","1865-2042"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Computer Science - Research and Development","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100635269","display_name":"Kenneth Lee","orcid":"https://orcid.org/0000-0003-3022-4868"},"institutions":[{"id":"https://openalex.org/I859038795","display_name":"Virginia Tech","ror":"https://ror.org/02smfhw86","country_code":"US","type":"education","lineage":["https://openalex.org/I859038795"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Kenneth Lee","raw_affiliation_strings":["Department of Computer Science, Virginia Tech, Blacksburg, VA, USA","Department of Computer Science Virginia Tech Blacksburg, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Virginia Tech, Blacksburg, VA, USA","institution_ids":["https://openalex.org/I859038795"]},{"raw_affiliation_string":"Department of Computer Science Virginia Tech Blacksburg, USA#TAB#","institution_ids":["https://openalex.org/I859038795"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066494596","display_name":"Heshan Lin","orcid":"https://orcid.org/0000-0001-9286-9421"},"institutions":[{"id":"https://openalex.org/I859038795","display_name":"Virginia Tech","ror":"https://ror.org/02smfhw86","country_code":"US","type":"education","lineage":["https://openalex.org/I859038795"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Heshan Lin","raw_affiliation_strings":["Department of Computer Science, Virginia Tech, Blacksburg, VA, USA","Department of Computer Science Virginia Tech Blacksburg, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Virginia Tech, Blacksburg, VA, USA","institution_ids":["https://openalex.org/I859038795"]},{"raw_affiliation_string":"Department of Computer Science Virginia Tech Blacksburg, USA#TAB#","institution_ids":["https://openalex.org/I859038795"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5058539554","display_name":"Wu-chun Feng","orcid":"https://orcid.org/0000-0002-6015-0727"},"institutions":[{"id":"https://openalex.org/I859038795","display_name":"Virginia Tech","ror":"https://ror.org/02smfhw86","country_code":"US","type":"education","lineage":["https://openalex.org/I859038795"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Wu-chun Feng","raw_affiliation_strings":["Department of Computer Science, Virginia Tech, Blacksburg, VA, USA","Department of Computer Science Virginia Tech Blacksburg, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Virginia Tech, Blacksburg, VA, USA","institution_ids":["https://openalex.org/I859038795"]},{"raw_affiliation_string":"Department of Computer Science Virginia Tech Blacksburg, USA#TAB#","institution_ids":["https://openalex.org/I859038795"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5100635269"],"corresponding_institution_ids":["https://openalex.org/I859038795"],"apc_list":null,"apc_paid":null,"fwci":2.3776,"has_fulltext":false,"cited_by_count":24,"citation_normalized_percentile":{"value":0.87765715,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"28","issue":"2-3","first_page":"175","last_page":"184"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8360201120376587},{"id":"https://openalex.org/keywords/bottleneck","display_name":"Bottleneck","score":0.6831164956092834},{"id":"https://openalex.org/keywords/pci-express","display_name":"PCI Express","score":0.5645397305488586},{"id":"https://openalex.org/keywords/central-processing-unit","display_name":"Central processing unit","score":0.5502826571464539},{"id":"https://openalex.org/keywords/kernel","display_name":"Kernel (algebra)","score":0.5474222302436829},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5461013913154602},{"id":"https://openalex.org/keywords/memory-controller","display_name":"Memory controller","score":0.5276419520378113},{"id":"https://openalex.org/keywords/data-access","display_name":"Data access","score":0.43420660495758057},{"id":"https://openalex.org/keywords/uniform-memory-access","display_name":"Uniform memory access","score":0.41168683767318726},{"id":"https://openalex.org/keywords/symmetric-multiprocessor-system","display_name":"Symmetric multiprocessor system","score":0.41100791096687317},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.39665868878364563},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3805159330368042},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.31003469228744507},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.26306143403053284},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.20726674795150757},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.13419786095619202}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8360201120376587},{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.6831164956092834},{"id":"https://openalex.org/C64270927","wikidata":"https://www.wikidata.org/wiki/Q206924","display_name":"PCI Express","level":3,"score":0.5645397305488586},{"id":"https://openalex.org/C49154492","wikidata":"https://www.wikidata.org/wiki/Q5300","display_name":"Central processing unit","level":2,"score":0.5502826571464539},{"id":"https://openalex.org/C74193536","wikidata":"https://www.wikidata.org/wiki/Q574844","display_name":"Kernel (algebra)","level":2,"score":0.5474222302436829},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5461013913154602},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.5276419520378113},{"id":"https://openalex.org/C47487241","wikidata":"https://www.wikidata.org/wiki/Q5227230","display_name":"Data access","level":2,"score":0.43420660495758057},{"id":"https://openalex.org/C51290061","wikidata":"https://www.wikidata.org/wiki/Q1936765","display_name":"Uniform memory access","level":4,"score":0.41168683767318726},{"id":"https://openalex.org/C172430144","wikidata":"https://www.wikidata.org/wiki/Q17111997","display_name":"Symmetric multiprocessor system","level":2,"score":0.41100791096687317},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.39665868878364563},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3805159330368042},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.31003469228744507},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.26306143403053284},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.20726674795150757},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.13419786095619202},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/s00450-012-0209-1","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s00450-012-0209-1","pdf_url":null,"source":{"id":"https://openalex.org/S22130598","display_name":"Computer Science - Research and Development","issn_l":"1865-2034","issn":["1865-2034","1865-2042"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319900","host_organization_name":"Springer Science+Business Media","host_organization_lineage":["https://openalex.org/P4310319900","https://openalex.org/P4310319965"],"host_organization_lineage_names":["Springer Science+Business Media","Springer Nature"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Computer Science - Research and Development","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5199999809265137,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1992851788","https://openalex.org/W2064373756","https://openalex.org/W2080592089","https://openalex.org/W2087375070","https://openalex.org/W2110195531","https://openalex.org/W2113282196","https://openalex.org/W2128022558","https://openalex.org/W2149234156","https://openalex.org/W2167334577","https://openalex.org/W2184317164","https://openalex.org/W2620746779","https://openalex.org/W2997701623","https://openalex.org/W3141954553","https://openalex.org/W4250047567"],"related_works":["https://openalex.org/W3094239885","https://openalex.org/W4383750273","https://openalex.org/W1548268164","https://openalex.org/W4250662367","https://openalex.org/W2984905932","https://openalex.org/W2217348846","https://openalex.org/W1982632559","https://openalex.org/W2573457208","https://openalex.org/W2566887379","https://openalex.org/W192975273"],"abstract_inverted_index":null,"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":2},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":5},{"year":2014,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
