{"id":"https://openalex.org/W4412604665","doi":"https://doi.org/10.1007/s00034-025-03242-2","title":"Dynamic Header Switch to Influence Switching Current Profile of an IC Chip","display_name":"Dynamic Header Switch to Influence Switching Current Profile of an IC Chip","publication_year":2025,"publication_date":"2025-07-23","ids":{"openalex":"https://openalex.org/W4412604665","doi":"https://doi.org/10.1007/s00034-025-03242-2"},"language":"en","primary_location":{"id":"doi:10.1007/s00034-025-03242-2","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s00034-025-03242-2","pdf_url":null,"source":{"id":"https://openalex.org/S20109229","display_name":"Circuits Systems and Signal Processing","issn_l":"0278-081X","issn":["0278-081X","1531-5878"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320186","host_organization_name":"Birkh\u00e4user","host_organization_lineage":["https://openalex.org/P4310320186","https://openalex.org/P4310319900"],"host_organization_lineage_names":["Birkh\u00e4user","Springer Science+Business Media"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Circuits, Systems, and Signal Processing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5082215420","display_name":"Vijay Pratap Yadav","orcid":"https://orcid.org/0000-0003-4827-6412"},"institutions":[{"id":"https://openalex.org/I57496824","display_name":"National Institute of Technology Arunachal Pradesh","ror":"https://ror.org/020cr8c43","country_code":"IN","type":"education","lineage":["https://openalex.org/I57496824"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Vijay Pratap Yadav","raw_affiliation_strings":["Integrated Circuit and System Lab, Department of Electronics and Communication, National Institute of Technology Arunachal Pradesh, Jote, Itanagar, 791113, India"],"affiliations":[{"raw_affiliation_string":"Integrated Circuit and System Lab, Department of Electronics and Communication, National Institute of Technology Arunachal Pradesh, Jote, Itanagar, 791113, India","institution_ids":["https://openalex.org/I57496824"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101511627","display_name":"Vipin Singh","orcid":"https://orcid.org/0000-0003-0312-0449"},"institutions":[{"id":"https://openalex.org/I57496824","display_name":"National Institute of Technology Arunachal Pradesh","ror":"https://ror.org/020cr8c43","country_code":"IN","type":"education","lineage":["https://openalex.org/I57496824"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Vipin Kumar Singh","raw_affiliation_strings":["Integrated Circuit and System Lab, Department of Electronics and Communication, National Institute of Technology Arunachal Pradesh, Jote, Itanagar, 791113, India"],"affiliations":[{"raw_affiliation_string":"Integrated Circuit and System Lab, Department of Electronics and Communication, National Institute of Technology Arunachal Pradesh, Jote, Itanagar, 791113, India","institution_ids":["https://openalex.org/I57496824"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108043490","display_name":"Ashish Kumar","orcid":"https://orcid.org/0000-0002-3221-5490"},"institutions":[{"id":"https://openalex.org/I57496824","display_name":"National Institute of Technology Arunachal Pradesh","ror":"https://ror.org/020cr8c43","country_code":"IN","type":"education","lineage":["https://openalex.org/I57496824"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Ashish Ranjan Kumar","raw_affiliation_strings":["Integrated Circuit and System Lab, Department of Electronics and Communication, National Institute of Technology Arunachal Pradesh, Jote, Itanagar, 791113, India"],"affiliations":[{"raw_affiliation_string":"Integrated Circuit and System Lab, Department of Electronics and Communication, National Institute of Technology Arunachal Pradesh, Jote, Itanagar, 791113, India","institution_ids":["https://openalex.org/I57496824"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010892694","display_name":"Tika Ram Pokhrel","orcid":"https://orcid.org/0000-0001-6766-7027"},"institutions":[{"id":"https://openalex.org/I4210107301","display_name":"Jain Vishva Bharati University","ror":"https://ror.org/01nkqk925","country_code":"IN","type":"education","lineage":["https://openalex.org/I4210107301"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Tika Ram Pokhrel","raw_affiliation_strings":["Department of Electronics and Communication, Vishnu Institute of Technology, Bhimavaram, Andhra Pradesh, 534202, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication, Vishnu Institute of Technology, Bhimavaram, Andhra Pradesh, 534202, India","institution_ids":["https://openalex.org/I4210107301"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065512661","display_name":"Sanjeev Kumar Metya","orcid":"https://orcid.org/0000-0003-4093-5639"},"institutions":[{"id":"https://openalex.org/I57496824","display_name":"National Institute of Technology Arunachal Pradesh","ror":"https://ror.org/020cr8c43","country_code":"IN","type":"education","lineage":["https://openalex.org/I57496824"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Sanjeev Kumar Metya","raw_affiliation_strings":["Integrated Circuit and System Lab, Department of Electronics and Communication, National Institute of Technology Arunachal Pradesh, Jote, Itanagar, 791113, India"],"affiliations":[{"raw_affiliation_string":"Integrated Circuit and System Lab, Department of Electronics and Communication, National Institute of Technology Arunachal Pradesh, Jote, Itanagar, 791113, India","institution_ids":["https://openalex.org/I57496824"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5009067589","display_name":"Alak Majumder","orcid":"https://orcid.org/0000-0003-4775-8591"},"institutions":[{"id":"https://openalex.org/I57496824","display_name":"National Institute of Technology Arunachal Pradesh","ror":"https://ror.org/020cr8c43","country_code":"IN","type":"education","lineage":["https://openalex.org/I57496824"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Alak Majumder","raw_affiliation_strings":["Integrated Circuit and System Lab, Department of Electronics and Communication, National Institute of Technology Arunachal Pradesh, Jote, Itanagar, 791113, India"],"affiliations":[{"raw_affiliation_string":"Integrated Circuit and System Lab, Department of Electronics and Communication, National Institute of Technology Arunachal Pradesh, Jote, Itanagar, 791113, India","institution_ids":["https://openalex.org/I57496824"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5082215420"],"corresponding_institution_ids":["https://openalex.org/I57496824"],"apc_list":null,"apc_paid":null,"fwci":0.7843,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.75766486,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":"45","issue":"1","first_page":"393","last_page":"417"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/header","display_name":"Header","score":0.638489305973053},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5582329034805298},{"id":"https://openalex.org/keywords/fast-switching","display_name":"Fast switching","score":0.533285915851593},{"id":"https://openalex.org/keywords/current","display_name":"Current (fluid)","score":0.4576796889305115},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.38213762640953064},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.2847633957862854},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.27434849739074707},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23632857203483582},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.14510056376457214}],"concepts":[{"id":"https://openalex.org/C48105269","wikidata":"https://www.wikidata.org/wiki/Q1141160","display_name":"Header","level":2,"score":0.638489305973053},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5582329034805298},{"id":"https://openalex.org/C3019721787","wikidata":"https://www.wikidata.org/wiki/Q180805","display_name":"Fast switching","level":3,"score":0.533285915851593},{"id":"https://openalex.org/C148043351","wikidata":"https://www.wikidata.org/wiki/Q4456944","display_name":"Current (fluid)","level":2,"score":0.4576796889305115},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.38213762640953064},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.2847633957862854},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.27434849739074707},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23632857203483582},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.14510056376457214},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/s00034-025-03242-2","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s00034-025-03242-2","pdf_url":null,"source":{"id":"https://openalex.org/S20109229","display_name":"Circuits Systems and Signal Processing","issn_l":"0278-081X","issn":["0278-081X","1531-5878"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320186","host_organization_name":"Birkh\u00e4user","host_organization_lineage":["https://openalex.org/P4310320186","https://openalex.org/P4310319900"],"host_organization_lineage_names":["Birkh\u00e4user","Springer Science+Business Media"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Circuits, Systems, and Signal Processing","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320325255","display_name":"Ministry of Electronics and Information technology","ror":null}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1967025422","https://openalex.org/W2042352336","https://openalex.org/W2081379617","https://openalex.org/W2086775835","https://openalex.org/W2124352950","https://openalex.org/W2146734124","https://openalex.org/W2161037304","https://openalex.org/W2292379782","https://openalex.org/W2587615061","https://openalex.org/W2971948544","https://openalex.org/W3061280797","https://openalex.org/W3135390746","https://openalex.org/W3198030672","https://openalex.org/W3217391893"],"related_works":["https://openalex.org/W2171597999","https://openalex.org/W2189136227","https://openalex.org/W1866537546","https://openalex.org/W630850086","https://openalex.org/W3200508093","https://openalex.org/W4372053344","https://openalex.org/W3193978431","https://openalex.org/W2379752180","https://openalex.org/W2519240373","https://openalex.org/W1496096987"],"abstract_inverted_index":null,"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2026-02-03T23:48:18.283914","created_date":"2025-10-10T00:00:00"}