{"id":"https://openalex.org/W4405611230","doi":"https://doi.org/10.1007/s00034-024-02935-4","title":"Design of Hybrid CMOS-Memristor Combinational Circuits: Maximizing Efficiency with Low Power, Area, and Delay","display_name":"Design of Hybrid CMOS-Memristor Combinational Circuits: Maximizing Efficiency with Low Power, Area, and Delay","publication_year":2024,"publication_date":"2024-12-19","ids":{"openalex":"https://openalex.org/W4405611230","doi":"https://doi.org/10.1007/s00034-024-02935-4"},"language":"en","primary_location":{"id":"doi:10.1007/s00034-024-02935-4","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s00034-024-02935-4","pdf_url":null,"source":{"id":"https://openalex.org/S20109229","display_name":"Circuits Systems and Signal Processing","issn_l":"0278-081X","issn":["0278-081X","1531-5878"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320186","host_organization_name":"Birkh\u00e4user","host_organization_lineage":["https://openalex.org/P4310320186","https://openalex.org/P4310319900"],"host_organization_lineage_names":["Birkh\u00e4user","Springer Science+Business Media"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Circuits, Systems, and Signal Processing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5025760456","display_name":"Haroon Rasheed","orcid":"https://orcid.org/0000-0002-5507-9575"},"institutions":[{"id":"https://openalex.org/I876193797","display_name":"Vellore Institute of Technology University","ror":"https://ror.org/00qzypv28","country_code":"IN","type":"education","lineage":["https://openalex.org/I876193797"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Haroon S. Rasheed","raw_affiliation_strings":["School of Electronics Engineering, Vellore Institute of Technology, Vellore, Tamil Nadu, 632014, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electronics Engineering, Vellore Institute of Technology, Vellore, Tamil Nadu, 632014, India","institution_ids":["https://openalex.org/I876193797"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5051253503","display_name":"Rajeev Pankaj Nelapati","orcid":"https://orcid.org/0000-0001-6606-0119"},"institutions":[{"id":"https://openalex.org/I876193797","display_name":"Vellore Institute of Technology University","ror":"https://ror.org/00qzypv28","country_code":"IN","type":"education","lineage":["https://openalex.org/I876193797"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Rajeev Pankaj Nelapati","raw_affiliation_strings":["School of Electronics Engineering, Vellore Institute of Technology, Vellore, Tamil Nadu, 632014, India"],"raw_orcid":"https://orcid.org/0000-0001-6606-0119","affiliations":[{"raw_affiliation_string":"School of Electronics Engineering, Vellore Institute of Technology, Vellore, Tamil Nadu, 632014, India","institution_ids":["https://openalex.org/I876193797"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5051253503"],"corresponding_institution_ids":["https://openalex.org/I876193797"],"apc_list":null,"apc_paid":null,"fwci":0.8654,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.74391598,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":97,"max":98},"biblio":{"volume":"44","issue":"4","first_page":"2242","last_page":"2265"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.8588351607322693},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7514073848724365},{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.7076284885406494},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5906556248664856},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5260874032974243},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4653170108795166},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4539097249507904},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.3398306369781494},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.304779589176178},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.25267601013183594},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.08908960223197937}],"concepts":[{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.8588351607322693},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7514073848724365},{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.7076284885406494},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5906556248664856},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5260874032974243},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4653170108795166},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4539097249507904},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.3398306369781494},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.304779589176178},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.25267601013183594},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.08908960223197937},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/s00034-024-02935-4","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s00034-024-02935-4","pdf_url":null,"source":{"id":"https://openalex.org/S20109229","display_name":"Circuits Systems and Signal Processing","issn_l":"0278-081X","issn":["0278-081X","1531-5878"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320186","host_organization_name":"Birkh\u00e4user","host_organization_lineage":["https://openalex.org/P4310320186","https://openalex.org/P4310319900"],"host_organization_lineage_names":["Birkh\u00e4user","Springer Science+Business Media"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Circuits, Systems, and Signal Processing","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8600000143051147,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":36,"referenced_works":["https://openalex.org/W2059441802","https://openalex.org/W2112181056","https://openalex.org/W2162651880","https://openalex.org/W2514437230","https://openalex.org/W2516467421","https://openalex.org/W2518320872","https://openalex.org/W2620105511","https://openalex.org/W2771687934","https://openalex.org/W2774773774","https://openalex.org/W2778155126","https://openalex.org/W2807750997","https://openalex.org/W2912426041","https://openalex.org/W2969107851","https://openalex.org/W2985217728","https://openalex.org/W2999670583","https://openalex.org/W3008779706","https://openalex.org/W3136861880","https://openalex.org/W3159081599","https://openalex.org/W3174228295","https://openalex.org/W3185246871","https://openalex.org/W3191637546","https://openalex.org/W4211008364","https://openalex.org/W4225957502","https://openalex.org/W4281937002","https://openalex.org/W4289976683","https://openalex.org/W4308348227","https://openalex.org/W4308963954","https://openalex.org/W4313251787","https://openalex.org/W4322502050","https://openalex.org/W4360838457","https://openalex.org/W4379382319","https://openalex.org/W4380082435","https://openalex.org/W4389675978","https://openalex.org/W4391213464","https://openalex.org/W4392545058","https://openalex.org/W6671249417"],"related_works":["https://openalex.org/W4229452466","https://openalex.org/W2966276069","https://openalex.org/W2057841671","https://openalex.org/W2248394785","https://openalex.org/W2389800961","https://openalex.org/W1995389502","https://openalex.org/W2170979950","https://openalex.org/W2039299085","https://openalex.org/W2074526596","https://openalex.org/W4242010157"],"abstract_inverted_index":null,"counts_by_year":[{"year":2025,"cited_by_count":5}],"updated_date":"2026-06-13T06:13:01.061226","created_date":"2025-10-10T00:00:00"}
