{"id":"https://openalex.org/W4402625495","doi":"https://doi.org/10.1007/s00034-024-02857-1","title":"FPGA Implementation and Performance Analysis of Parallel Prefix Structures for Modular Adders Design","display_name":"FPGA Implementation and Performance Analysis of Parallel Prefix Structures for Modular Adders Design","publication_year":2024,"publication_date":"2024-09-19","ids":{"openalex":"https://openalex.org/W4402625495","doi":"https://doi.org/10.1007/s00034-024-02857-1"},"language":"en","primary_location":{"id":"doi:10.1007/s00034-024-02857-1","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s00034-024-02857-1","pdf_url":null,"source":{"id":"https://openalex.org/S20109229","display_name":"Circuits Systems and Signal Processing","issn_l":"0278-081X","issn":["0278-081X","1531-5878"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320186","host_organization_name":"Birkh\u00e4user","host_organization_lineage":["https://openalex.org/P4310320186","https://openalex.org/P4310319900"],"host_organization_lineage_names":["Birkh\u00e4user","Springer Science+Business Media"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Circuits, Systems, and Signal Processing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5010260191","display_name":"Tukur Gupta","orcid":"https://orcid.org/0000-0003-3853-7068"},"institutions":[{"id":"https://openalex.org/I166533956","display_name":"Institute of Management Technology","ror":"https://ror.org/05k0kb696","country_code":"IN","type":"education","lineage":["https://openalex.org/I166533956"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Tukur Gupta","raw_affiliation_strings":["Department of Electronics and Communication Engineering, Ajay Kumar Garg Engineering College, Ghaziabad, India"],"raw_orcid":"https://orcid.org/0000-0003-3853-7068","affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, Ajay Kumar Garg Engineering College, Ghaziabad, India","institution_ids":["https://openalex.org/I166533956"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016194897","display_name":"Gaurav Verma","orcid":"https://orcid.org/0000-0001-7350-0813"},"institutions":[{"id":"https://openalex.org/I154970844","display_name":"Jaypee Institute of Information Technology","ror":"https://ror.org/05sttyy11","country_code":"IN","type":"education","lineage":["https://openalex.org/I154970844"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Gaurav Verma","raw_affiliation_strings":["Department of Electronics and Communication Engineering, Jaypee Institute of Information Technology, Noida, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, Jaypee Institute of Information Technology, Noida, India","institution_ids":["https://openalex.org/I154970844"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5051811207","display_name":"Shamim Akhter","orcid":"https://orcid.org/0000-0003-1408-9133"},"institutions":[{"id":"https://openalex.org/I154970844","display_name":"Jaypee Institute of Information Technology","ror":"https://ror.org/05sttyy11","country_code":"IN","type":"education","lineage":["https://openalex.org/I154970844"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Shamim Akhter","raw_affiliation_strings":["Department of Electronics and Communication Engineering, Jaypee Institute of Information Technology, Noida, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, Jaypee Institute of Information Technology, Noida, India","institution_ids":["https://openalex.org/I154970844"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5010260191"],"corresponding_institution_ids":["https://openalex.org/I166533956"],"apc_list":null,"apc_paid":null,"fwci":1.7308,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.848345,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":98,"max":99},"biblio":{"volume":"44","issue":"2","first_page":"992","last_page":"1016"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.7557446956634521},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7519125938415527},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.7322710752487183},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6323180198669434},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5693106651306152},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5459531545639038},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.4488874673843384},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4380333721637726},{"id":"https://openalex.org/keywords/prefix","display_name":"Prefix","score":0.43002697825431824},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3522784113883972},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.18261748552322388},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.16856351494789124},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.11474394798278809},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.06254151463508606}],"concepts":[{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.7557446956634521},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7519125938415527},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.7322710752487183},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6323180198669434},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5693106651306152},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5459531545639038},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.4488874673843384},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4380333721637726},{"id":"https://openalex.org/C141603448","wikidata":"https://www.wikidata.org/wiki/Q134830","display_name":"Prefix","level":2,"score":0.43002697825431824},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3522784113883972},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.18261748552322388},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.16856351494789124},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.11474394798278809},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.06254151463508606},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/s00034-024-02857-1","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s00034-024-02857-1","pdf_url":null,"source":{"id":"https://openalex.org/S20109229","display_name":"Circuits Systems and Signal Processing","issn_l":"0278-081X","issn":["0278-081X","1531-5878"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320186","host_organization_name":"Birkh\u00e4user","host_organization_lineage":["https://openalex.org/P4310320186","https://openalex.org/P4310319900"],"host_organization_lineage_names":["Birkh\u00e4user","Springer Science+Business Media"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Circuits, Systems, and Signal Processing","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":31,"referenced_works":["https://openalex.org/W1518236483","https://openalex.org/W1582324226","https://openalex.org/W1963965124","https://openalex.org/W2001236151","https://openalex.org/W2039636925","https://openalex.org/W2074224805","https://openalex.org/W2112969627","https://openalex.org/W2122910852","https://openalex.org/W2131647018","https://openalex.org/W2138772319","https://openalex.org/W2142727297","https://openalex.org/W2143462372","https://openalex.org/W2147847555","https://openalex.org/W2153331684","https://openalex.org/W2155401564","https://openalex.org/W2168543008","https://openalex.org/W2597767755","https://openalex.org/W2784119351","https://openalex.org/W2795044005","https://openalex.org/W2897374949","https://openalex.org/W2921989166","https://openalex.org/W3096343028","https://openalex.org/W3103339143","https://openalex.org/W3113799779","https://openalex.org/W3216713163","https://openalex.org/W4292209894","https://openalex.org/W4296341531","https://openalex.org/W4313250823","https://openalex.org/W4387331711","https://openalex.org/W4387670978","https://openalex.org/W4391304263"],"related_works":["https://openalex.org/W4390550886","https://openalex.org/W3217463396","https://openalex.org/W2790557758","https://openalex.org/W2516396101","https://openalex.org/W3204929712","https://openalex.org/W4295102875","https://openalex.org/W2300671402","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W1608572506"],"abstract_inverted_index":null,"counts_by_year":[{"year":2026,"cited_by_count":3},{"year":2025,"cited_by_count":7}],"updated_date":"2026-06-13T06:13:01.061226","created_date":"2025-10-10T00:00:00"}