{"id":"https://openalex.org/W4385043607","doi":"https://doi.org/10.1007/s00034-023-02456-6","title":"Power and Delay-Efficient Matrix Vector Multiplier Units for the LSTM Networks Using Activity Span Reduction Technique and Recursive Adders","display_name":"Power and Delay-Efficient Matrix Vector Multiplier Units for the LSTM Networks Using Activity Span Reduction Technique and Recursive Adders","publication_year":2023,"publication_date":"2023-07-21","ids":{"openalex":"https://openalex.org/W4385043607","doi":"https://doi.org/10.1007/s00034-023-02456-6"},"language":"en","primary_location":{"id":"doi:10.1007/s00034-023-02456-6","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s00034-023-02456-6","pdf_url":null,"source":{"id":"https://openalex.org/S20109229","display_name":"Circuits Systems and Signal Processing","issn_l":"0278-081X","issn":["0278-081X","1531-5878"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320186","host_organization_name":"Birkh\u00e4user","host_organization_lineage":["https://openalex.org/P4310320186","https://openalex.org/P4310319900"],"host_organization_lineage_names":["Birkh\u00e4user","Springer Science+Business Media"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Circuits, Systems, and Signal Processing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5019861813","display_name":"Tresa Joseph","orcid":"https://orcid.org/0000-0002-2624-376X"},"institutions":[{"id":"https://openalex.org/I114845381","display_name":"National Institute of Technology Calicut","ror":"https://ror.org/03yyd7552","country_code":"IN","type":"education","lineage":["https://openalex.org/I114845381"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Tresa Joseph","raw_affiliation_strings":["Department of Electronics and Communication Engineering, National Institute of Technology Calicut, Kozhikode, Kerala, 673601, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, National Institute of Technology Calicut, Kozhikode, Kerala, 673601, India","institution_ids":["https://openalex.org/I114845381"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5071621923","display_name":"T. S. Bindiya","orcid":null},"institutions":[{"id":"https://openalex.org/I114845381","display_name":"National Institute of Technology Calicut","ror":"https://ror.org/03yyd7552","country_code":"IN","type":"education","lineage":["https://openalex.org/I114845381"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"T. S. Bindiya","raw_affiliation_strings":["Department of Electronics and Communication Engineering, National Institute of Technology Calicut, Kozhikode, Kerala, 673601, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, National Institute of Technology Calicut, Kozhikode, Kerala, 673601, India","institution_ids":["https://openalex.org/I114845381"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5019861813"],"corresponding_institution_ids":["https://openalex.org/I114845381"],"apc_list":null,"apc_paid":null,"fwci":0.9075,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.70461869,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":96,"max":97},"biblio":{"volume":"42","issue":"12","first_page":"7494","last_page":"7528"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9940999746322632,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.7615618705749512},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6896147727966309},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.6339229941368103},{"id":"https://openalex.org/keywords/multiplication","display_name":"Multiplication (music)","score":0.4986560344696045},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.4624159038066864},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.37445467710494995},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.36102238297462463},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.33631616830825806},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3270307779312134},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.32656538486480713},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.15862935781478882},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.1393030285835266},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09118536114692688}],"concepts":[{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.7615618705749512},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6896147727966309},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.6339229941368103},{"id":"https://openalex.org/C2780595030","wikidata":"https://www.wikidata.org/wiki/Q3860309","display_name":"Multiplication (music)","level":2,"score":0.4986560344696045},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.4624159038066864},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.37445467710494995},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.36102238297462463},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.33631616830825806},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3270307779312134},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.32656538486480713},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.15862935781478882},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.1393030285835266},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09118536114692688},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/s00034-023-02456-6","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s00034-023-02456-6","pdf_url":null,"source":{"id":"https://openalex.org/S20109229","display_name":"Circuits Systems and Signal Processing","issn_l":"0278-081X","issn":["0278-081X","1531-5878"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320186","host_organization_name":"Birkh\u00e4user","host_organization_lineage":["https://openalex.org/P4310320186","https://openalex.org/P4310319900"],"host_organization_lineage_names":["Birkh\u00e4user","Springer Science+Business Media"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Circuits, Systems, and Signal Processing","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8899999856948853}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":29,"referenced_works":["https://openalex.org/W1981276685","https://openalex.org/W2095603848","https://openalex.org/W2160815625","https://openalex.org/W2276486856","https://openalex.org/W2285660444","https://openalex.org/W2518660313","https://openalex.org/W2730834423","https://openalex.org/W2885195348","https://openalex.org/W2886025771","https://openalex.org/W2890379003","https://openalex.org/W2893384461","https://openalex.org/W2962820060","https://openalex.org/W2979624870","https://openalex.org/W2984242728","https://openalex.org/W3134550335","https://openalex.org/W3164155163","https://openalex.org/W3165049394","https://openalex.org/W3211744662","https://openalex.org/W4200157451","https://openalex.org/W4224010033","https://openalex.org/W4224232295","https://openalex.org/W4287736153","https://openalex.org/W4318275337","https://openalex.org/W4319875879","https://openalex.org/W4322502720","https://openalex.org/W4375947191","https://openalex.org/W4378222268","https://openalex.org/W6606960104","https://openalex.org/W6639078740"],"related_works":["https://openalex.org/W3196607417","https://openalex.org/W2013839957","https://openalex.org/W2036954759","https://openalex.org/W2057797376","https://openalex.org/W2090319426","https://openalex.org/W2506252583","https://openalex.org/W2048249848","https://openalex.org/W2260716361","https://openalex.org/W1987422982","https://openalex.org/W4281295723"],"abstract_inverted_index":null,"counts_by_year":[{"year":2024,"cited_by_count":3}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}
