{"id":"https://openalex.org/W4376614169","doi":"https://doi.org/10.1007/s00034-023-02394-3","title":"Design of a Power-Performance-Area (PPA) Optimized MOS Current Mode Logic Pre-scaler","display_name":"Design of a Power-Performance-Area (PPA) Optimized MOS Current Mode Logic Pre-scaler","publication_year":2023,"publication_date":"2023-05-13","ids":{"openalex":"https://openalex.org/W4376614169","doi":"https://doi.org/10.1007/s00034-023-02394-3"},"language":"en","primary_location":{"id":"doi:10.1007/s00034-023-02394-3","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s00034-023-02394-3","pdf_url":null,"source":{"id":"https://openalex.org/S20109229","display_name":"Circuits Systems and Signal Processing","issn_l":"0278-081X","issn":["0278-081X","1531-5878"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320186","host_organization_name":"Birkh\u00e4user","host_organization_lineage":["https://openalex.org/P4310320186","https://openalex.org/P4310319900"],"host_organization_lineage_names":["Birkh\u00e4user","Springer Science+Business Media"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Circuits, Systems, and Signal Processing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5009412835","display_name":"Subhanil Maity","orcid":"https://orcid.org/0000-0003-1866-5281"},"institutions":[{"id":"https://openalex.org/I101326570","display_name":"National Institute of Technology Sikkim","ror":"https://ror.org/04pam3b03","country_code":"IN","type":"education","lineage":["https://openalex.org/I101326570"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Subhanil Maity","raw_affiliation_strings":["Department of Electronics and Communication Engineering, National Institute of Technology Sikkim, Ravangla, 737139, Sikkim, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, National Institute of Technology Sikkim, Ravangla, 737139, Sikkim, India","institution_ids":["https://openalex.org/I101326570"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5065528859","display_name":"Sanjay Kumar Jana","orcid":"https://orcid.org/0000-0001-5143-8000"},"institutions":[{"id":"https://openalex.org/I101326570","display_name":"National Institute of Technology Sikkim","ror":"https://ror.org/04pam3b03","country_code":"IN","type":"education","lineage":["https://openalex.org/I101326570"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Sanjay Kumar Jana","raw_affiliation_strings":["Department of Electronics and Communication Engineering, National Institute of Technology Sikkim, Ravangla, 737139, Sikkim, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, National Institute of Technology Sikkim, Ravangla, 737139, Sikkim, India","institution_ids":["https://openalex.org/I101326570"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5009412835"],"corresponding_institution_ids":["https://openalex.org/I101326570"],"apc_list":null,"apc_paid":null,"fwci":0.7801,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.70698217,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":96,"max":99},"biblio":{"volume":"42","issue":"10","first_page":"5783","last_page":"5798"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/figure-of-merit","display_name":"Figure of merit","score":0.6553493738174438},{"id":"https://openalex.org/keywords/current-mode-logic","display_name":"Current-mode logic","score":0.6062819957733154},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5874141454696655},{"id":"https://openalex.org/keywords/node","display_name":"Node (physics)","score":0.5758938789367676},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4816409647464752},{"id":"https://openalex.org/keywords/dissipation","display_name":"Dissipation","score":0.4461817443370819},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4433761239051819},{"id":"https://openalex.org/keywords/mode","display_name":"Mode (computer interface)","score":0.4348878264427185},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4144444763660431},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.2928425073623657},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22924035787582397},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.11039713025093079}],"concepts":[{"id":"https://openalex.org/C130277099","wikidata":"https://www.wikidata.org/wiki/Q3676605","display_name":"Figure of merit","level":2,"score":0.6553493738174438},{"id":"https://openalex.org/C2780295579","wikidata":"https://www.wikidata.org/wiki/Q5195108","display_name":"Current-mode logic","level":3,"score":0.6062819957733154},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5874141454696655},{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.5758938789367676},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4816409647464752},{"id":"https://openalex.org/C135402231","wikidata":"https://www.wikidata.org/wiki/Q898440","display_name":"Dissipation","level":2,"score":0.4461817443370819},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4433761239051819},{"id":"https://openalex.org/C48677424","wikidata":"https://www.wikidata.org/wiki/Q6888088","display_name":"Mode (computer interface)","level":2,"score":0.4348878264427185},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4144444763660431},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.2928425073623657},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22924035787582397},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.11039713025093079},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/s00034-023-02394-3","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s00034-023-02394-3","pdf_url":null,"source":{"id":"https://openalex.org/S20109229","display_name":"Circuits Systems and Signal Processing","issn_l":"0278-081X","issn":["0278-081X","1531-5878"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320186","host_organization_name":"Birkh\u00e4user","host_organization_lineage":["https://openalex.org/P4310320186","https://openalex.org/P4310319900"],"host_organization_lineage_names":["Birkh\u00e4user","Springer Science+Business Media"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Circuits, Systems, and Signal Processing","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.7300000190734863,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1487250959","https://openalex.org/W1974337707","https://openalex.org/W2003259124","https://openalex.org/W2013482531","https://openalex.org/W2157903484","https://openalex.org/W2170087371","https://openalex.org/W2278825048","https://openalex.org/W2294518504","https://openalex.org/W2343110581","https://openalex.org/W2461176109","https://openalex.org/W2582662491","https://openalex.org/W2789363067","https://openalex.org/W2803036550","https://openalex.org/W2805351111","https://openalex.org/W2896908535","https://openalex.org/W2900151268","https://openalex.org/W2944635866","https://openalex.org/W3015733690","https://openalex.org/W3166246334","https://openalex.org/W3189059657"],"related_works":["https://openalex.org/W2055545425","https://openalex.org/W2494161373","https://openalex.org/W2347486132","https://openalex.org/W2740421154","https://openalex.org/W2022229688","https://openalex.org/W4229335874","https://openalex.org/W2350340797","https://openalex.org/W3014887789","https://openalex.org/W2079984045","https://openalex.org/W4293224283"],"abstract_inverted_index":null,"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":5}],"updated_date":"2026-04-03T22:45:19.894376","created_date":"2025-10-10T00:00:00"}
