{"id":"https://openalex.org/W4288428506","doi":"https://doi.org/10.1007/s00034-022-02109-0","title":"Analysis and Design of a High-Bandwidth Front-End Sampler for Time-Interleaved ADCs","display_name":"Analysis and Design of a High-Bandwidth Front-End Sampler for Time-Interleaved ADCs","publication_year":2022,"publication_date":"2022-07-28","ids":{"openalex":"https://openalex.org/W4288428506","doi":"https://doi.org/10.1007/s00034-022-02109-0"},"language":"en","primary_location":{"id":"doi:10.1007/s00034-022-02109-0","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s00034-022-02109-0","pdf_url":null,"source":{"id":"https://openalex.org/S20109229","display_name":"Circuits Systems and Signal Processing","issn_l":"0278-081X","issn":["0278-081X","1531-5878"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320186","host_organization_name":"Birkh\u00e4user","host_organization_lineage":["https://openalex.org/P4310320186","https://openalex.org/P4310319900"],"host_organization_lineage_names":["Birkh\u00e4user","Springer Science+Business Media"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Circuits, Systems, and Signal Processing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5065553255","display_name":"Jiale Ding","orcid":null},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Jiale Ding","raw_affiliation_strings":["Shaanxi Key Lab. of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi\u2019an, 710071, China","Shaanxi Key Lab. of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi'an, 710071, China"],"affiliations":[{"raw_affiliation_string":"Shaanxi Key Lab. of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi\u2019an, 710071, China","institution_ids":["https://openalex.org/I149594827"]},{"raw_affiliation_string":"Shaanxi Key Lab. of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi'an, 710071, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063460242","display_name":"Yu-Kai Huang","orcid":"https://orcid.org/0000-0003-1736-8701"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yukai Huang","raw_affiliation_strings":["Shaanxi Key Lab. of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi\u2019an, 710071, China","Shaanxi Key Lab. of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi'an, 710071, China"],"affiliations":[{"raw_affiliation_string":"Shaanxi Key Lab. of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi\u2019an, 710071, China","institution_ids":["https://openalex.org/I149594827"]},{"raw_affiliation_string":"Shaanxi Key Lab. of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi'an, 710071, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021772164","display_name":"Dengquan Li","orcid":"https://orcid.org/0000-0002-9913-4644"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Dengquan Li","raw_affiliation_strings":["Shaanxi Key Lab. of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi\u2019an, 710071, China","Shaanxi Key Lab. of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi'an, 710071, China"],"affiliations":[{"raw_affiliation_string":"Shaanxi Key Lab. of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi\u2019an, 710071, China","institution_ids":["https://openalex.org/I149594827"]},{"raw_affiliation_string":"Shaanxi Key Lab. of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi'an, 710071, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100635138","display_name":"Shubin Liu","orcid":"https://orcid.org/0000-0002-9942-0069"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shubin Liu","raw_affiliation_strings":["Shaanxi Key Lab. of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi\u2019an, 710071, China","Shaanxi Key Lab. of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi'an, 710071, China"],"affiliations":[{"raw_affiliation_string":"Shaanxi Key Lab. of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi\u2019an, 710071, China","institution_ids":["https://openalex.org/I149594827"]},{"raw_affiliation_string":"Shaanxi Key Lab. of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi'an, 710071, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029781634","display_name":"Yi Shen","orcid":"https://orcid.org/0000-0002-2586-3772"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yi Shen","raw_affiliation_strings":["Shaanxi Key Lab. of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi\u2019an, 710071, China","Shaanxi Key Lab. of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi'an, 710071, China"],"affiliations":[{"raw_affiliation_string":"Shaanxi Key Lab. of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi\u2019an, 710071, China","institution_ids":["https://openalex.org/I149594827"]},{"raw_affiliation_string":"Shaanxi Key Lab. of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi'an, 710071, China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5039575274","display_name":"Zhangming Zhu","orcid":"https://orcid.org/0000-0002-7764-1928"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhangming Zhu","raw_affiliation_strings":["Shaanxi Key Lab. of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi\u2019an, 710071, China","Shaanxi Key Lab. of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi'an, 710071, China"],"affiliations":[{"raw_affiliation_string":"Shaanxi Key Lab. of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi\u2019an, 710071, China","institution_ids":["https://openalex.org/I149594827"]},{"raw_affiliation_string":"Shaanxi Key Lab. of Integrated Circuits and Systems, School of Microelectronics, Xidian University, Xi'an, 710071, China","institution_ids":["https://openalex.org/I149594827"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5065553255"],"corresponding_institution_ids":["https://openalex.org/I149594827"],"apc_list":null,"apc_paid":null,"fwci":0.1629,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.41981344,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":95},"biblio":{"volume":"41","issue":"12","first_page":"6632","last_page":"6650"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/feedthrough","display_name":"Feedthrough","score":0.6320685744285583},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6074430346488953},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.6067171692848206},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5782148838043213},{"id":"https://openalex.org/keywords/skew","display_name":"Skew","score":0.5614200234413147},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.510043203830719},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4993300437927246},{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.4715828001499176},{"id":"https://openalex.org/keywords/front-and-back-ends","display_name":"Front and back ends","score":0.4564608931541443},{"id":"https://openalex.org/keywords/analog-signal-processing","display_name":"Analog signal processing","score":0.4201148748397827},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.40244442224502563},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4007681608200073},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.339383602142334},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.2659400701522827},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.18593508005142212},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.13579797744750977}],"concepts":[{"id":"https://openalex.org/C2777303812","wikidata":"https://www.wikidata.org/wiki/Q5441253","display_name":"Feedthrough","level":2,"score":0.6320685744285583},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6074430346488953},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.6067171692848206},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5782148838043213},{"id":"https://openalex.org/C43711488","wikidata":"https://www.wikidata.org/wiki/Q7534783","display_name":"Skew","level":2,"score":0.5614200234413147},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.510043203830719},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4993300437927246},{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.4715828001499176},{"id":"https://openalex.org/C53016008","wikidata":"https://www.wikidata.org/wiki/Q620167","display_name":"Front and back ends","level":2,"score":0.4564608931541443},{"id":"https://openalex.org/C379707","wikidata":"https://www.wikidata.org/wiki/Q2328303","display_name":"Analog signal processing","level":4,"score":0.4201148748397827},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.40244442224502563},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4007681608200073},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.339383602142334},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.2659400701522827},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.18593508005142212},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.13579797744750977},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/s00034-022-02109-0","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s00034-022-02109-0","pdf_url":null,"source":{"id":"https://openalex.org/S20109229","display_name":"Circuits Systems and Signal Processing","issn_l":"0278-081X","issn":["0278-081X","1531-5878"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320186","host_organization_name":"Birkh\u00e4user","host_organization_lineage":["https://openalex.org/P4310320186","https://openalex.org/P4310319900"],"host_organization_lineage_names":["Birkh\u00e4user","Springer Science+Business Media"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Circuits, Systems, and Signal Processing","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8999999761581421}],"awards":[{"id":"https://openalex.org/G1190162107","display_name":null,"funder_award_id":"61904133","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G1525308069","display_name":null,"funder_award_id":"61961160703","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G2320218852","display_name":null,"funder_award_id":"62021004","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"},{"id":"https://openalex.org/G7289502488","display_name":null,"funder_award_id":"62090040","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1952988128","https://openalex.org/W2014759009","https://openalex.org/W2018915028","https://openalex.org/W2030293601","https://openalex.org/W2036567246","https://openalex.org/W2288666147","https://openalex.org/W2296644030","https://openalex.org/W2604162583","https://openalex.org/W2801969541","https://openalex.org/W2902667012","https://openalex.org/W2906404755","https://openalex.org/W3047472356","https://openalex.org/W3082320727","https://openalex.org/W3090492953","https://openalex.org/W3090680032","https://openalex.org/W3097426630","https://openalex.org/W3158234864","https://openalex.org/W3159599617","https://openalex.org/W3193150836"],"related_works":["https://openalex.org/W2899084033","https://openalex.org/W1977807246","https://openalex.org/W2044982717","https://openalex.org/W2139890664","https://openalex.org/W2145015417","https://openalex.org/W2096197213","https://openalex.org/W2143595946","https://openalex.org/W2131673713","https://openalex.org/W2759471224","https://openalex.org/W4288428506"],"abstract_inverted_index":null,"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}