{"id":"https://openalex.org/W2889077987","doi":"https://doi.org/10.1007/s00034-018-0934-1","title":"An Auto-Calibrated Sense Amplifier with Offset Prediction Approach for Energy-Efficient SRAM","display_name":"An Auto-Calibrated Sense Amplifier with Offset Prediction Approach for Energy-Efficient SRAM","publication_year":2018,"publication_date":"2018-08-30","ids":{"openalex":"https://openalex.org/W2889077987","doi":"https://doi.org/10.1007/s00034-018-0934-1","mag":"2889077987"},"language":"en","primary_location":{"id":"doi:10.1007/s00034-018-0934-1","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s00034-018-0934-1","pdf_url":null,"source":{"id":"https://openalex.org/S20109229","display_name":"Circuits Systems and Signal Processing","issn_l":"0278-081X","issn":["0278-081X","1531-5878"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320186","host_organization_name":"Birkh\u00e4user","host_organization_lineage":["https://openalex.org/P4310320186","https://openalex.org/P4310319900"],"host_organization_lineage_names":["Birkh\u00e4user","Springer Science+Business Media"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Circuits, Systems, and Signal Processing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5050869066","display_name":"Bhupendra Singh Reniwal","orcid":"https://orcid.org/0000-0002-5586-5365"},"institutions":[{"id":"https://openalex.org/I4210148827","display_name":"Birla Institute of Technology and Science, Pilani - Goa Campus","ror":"https://ror.org/046sh6j17","country_code":"IN","type":"education","lineage":["https://openalex.org/I4210148827","https://openalex.org/I74796645"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Bhupendra Singh Reniwal","raw_affiliation_strings":["Department of Electrical & Electronics Engineering, Birla Institute of Technology & Science Pilani, K. K. Birla Goa Campus, Goa, India"],"affiliations":[{"raw_affiliation_string":"Department of Electrical & Electronics Engineering, Birla Institute of Technology & Science Pilani, K. K. Birla Goa Campus, Goa, India","institution_ids":["https://openalex.org/I4210148827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5057916073","display_name":"Vikas Vijayvargiya","orcid":"https://orcid.org/0000-0003-1127-5811"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Vikas Vijayvargiya","raw_affiliation_strings":["Madanapalle Institute of Technology & Science, Angallu, AP, India"],"affiliations":[{"raw_affiliation_string":"Madanapalle Institute of Technology & Science, Angallu, AP, India","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091112200","display_name":"Pooran Singh","orcid":"https://orcid.org/0000-0002-6391-4163"},"institutions":[{"id":"https://openalex.org/I4210142644","display_name":"Intel (Malaysia)","ror":"https://ror.org/048jw1p35","country_code":"MY","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210142644"]}],"countries":["MY"],"is_corresponding":false,"raw_author_name":"Pooran Singh","raw_affiliation_strings":["Intel Corporation, Penang, Malaysia"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Penang, Malaysia","institution_ids":["https://openalex.org/I4210142644"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021254790","display_name":"Nand Kishor Yadav","orcid":"https://orcid.org/0000-0002-1849-3224"},"institutions":[{"id":"https://openalex.org/I64295750","display_name":"Indian Institute of Technology Indore","ror":"https://ror.org/01hhf7w52","country_code":"IN","type":"education","lineage":["https://openalex.org/I64295750"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Nand Kishor Yadav","raw_affiliation_strings":["Nanoscale Devices VLSI Circuits & System Design Lab, Indian Institute of Technology Indore, Indore, India"],"affiliations":[{"raw_affiliation_string":"Nanoscale Devices VLSI Circuits & System Design Lab, Indian Institute of Technology Indore, Indore, India","institution_ids":["https://openalex.org/I64295750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068792760","display_name":"Santosh Kumar Vishvakarma","orcid":"https://orcid.org/0000-0003-4223-0077"},"institutions":[{"id":"https://openalex.org/I64295750","display_name":"Indian Institute of Technology Indore","ror":"https://ror.org/01hhf7w52","country_code":"IN","type":"education","lineage":["https://openalex.org/I64295750"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Santosh Kumar Vishvakarma","raw_affiliation_strings":["Nanoscale Devices VLSI Circuits & System Design Lab, Indian Institute of Technology Indore, Indore, India"],"affiliations":[{"raw_affiliation_string":"Nanoscale Devices VLSI Circuits & System Design Lab, Indian Institute of Technology Indore, Indore, India","institution_ids":["https://openalex.org/I64295750"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5113195270","display_name":"Devesh Dwivedi","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Devesh Dwivedi","raw_affiliation_strings":["High Speeds Serial Link, Analog & Memory IP Development, Global Foundries, Bangalore, India"],"affiliations":[{"raw_affiliation_string":"High Speeds Serial Link, Analog & Memory IP Development, Global Foundries, Bangalore, India","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5050869066"],"corresponding_institution_ids":["https://openalex.org/I4210148827"],"apc_list":null,"apc_paid":null,"fwci":0.2607,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.57479883,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":"38","issue":"4","first_page":"1482","last_page":"1505"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/offset","display_name":"Offset (computer science)","score":0.8311076164245605},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6714358329772949},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.6214195489883423},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5621518492698669},{"id":"https://openalex.org/keywords/sense-amplifier","display_name":"Sense amplifier","score":0.5526509881019592},{"id":"https://openalex.org/keywords/input-offset-voltage","display_name":"Input offset voltage","score":0.5200673937797546},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.46350473165512085},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.45340341329574585},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.4473876655101776},{"id":"https://openalex.org/keywords/bit-error-rate","display_name":"Bit error rate","score":0.4469361901283264},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.4296188950538635},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.31592145562171936},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.23030990362167358},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.22206109762191772},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17762315273284912},{"id":"https://openalex.org/keywords/operational-amplifier","display_name":"Operational amplifier","score":0.14596474170684814},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.0751398503780365}],"concepts":[{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.8311076164245605},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6714358329772949},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.6214195489883423},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5621518492698669},{"id":"https://openalex.org/C32666082","wikidata":"https://www.wikidata.org/wiki/Q7450979","display_name":"Sense amplifier","level":3,"score":0.5526509881019592},{"id":"https://openalex.org/C63651839","wikidata":"https://www.wikidata.org/wiki/Q478566","display_name":"Input offset voltage","level":5,"score":0.5200673937797546},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.46350473165512085},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.45340341329574585},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.4473876655101776},{"id":"https://openalex.org/C56296756","wikidata":"https://www.wikidata.org/wiki/Q840922","display_name":"Bit error rate","level":3,"score":0.4469361901283264},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.4296188950538635},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.31592145562171936},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.23030990362167358},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.22206109762191772},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17762315273284912},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.14596474170684814},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.0751398503780365},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/s00034-018-0934-1","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s00034-018-0934-1","pdf_url":null,"source":{"id":"https://openalex.org/S20109229","display_name":"Circuits Systems and Signal Processing","issn_l":"0278-081X","issn":["0278-081X","1531-5878"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320186","host_organization_name":"Birkh\u00e4user","host_organization_lineage":["https://openalex.org/P4310320186","https://openalex.org/P4310319900"],"host_organization_lineage_names":["Birkh\u00e4user","Springer Science+Business Media"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Circuits, Systems, and Signal Processing","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8700000047683716}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":32,"referenced_works":["https://openalex.org/W941595258","https://openalex.org/W1585999621","https://openalex.org/W1966841456","https://openalex.org/W1967035245","https://openalex.org/W1982871476","https://openalex.org/W1991075467","https://openalex.org/W2018037110","https://openalex.org/W2024952802","https://openalex.org/W2028643888","https://openalex.org/W2029712422","https://openalex.org/W2046515116","https://openalex.org/W2059663785","https://openalex.org/W2062742275","https://openalex.org/W2074628056","https://openalex.org/W2091711257","https://openalex.org/W2092277707","https://openalex.org/W2105614673","https://openalex.org/W2114758430","https://openalex.org/W2115376510","https://openalex.org/W2115811012","https://openalex.org/W2119647737","https://openalex.org/W2138934536","https://openalex.org/W2139138351","https://openalex.org/W2143394661","https://openalex.org/W2150460978","https://openalex.org/W2164967515","https://openalex.org/W2168101540","https://openalex.org/W2221168811","https://openalex.org/W2293090515","https://openalex.org/W2471241177","https://openalex.org/W2559636186","https://openalex.org/W2562712965"],"related_works":["https://openalex.org/W1835913819","https://openalex.org/W2051363901","https://openalex.org/W2127348582","https://openalex.org/W2136142653","https://openalex.org/W3085306935","https://openalex.org/W2373152541","https://openalex.org/W4388145675","https://openalex.org/W2174410816","https://openalex.org/W2146647189","https://openalex.org/W3209598999"],"abstract_inverted_index":null,"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}