{"id":"https://openalex.org/W2737153395","doi":"https://doi.org/10.1007/s00034-017-0609-3","title":"VLSI-Based Pipeline Architecture for Reversible Image Watermarking by Difference Expansion with High-Level Synthesis Approach","display_name":"VLSI-Based Pipeline Architecture for Reversible Image Watermarking by Difference Expansion with High-Level Synthesis Approach","publication_year":2017,"publication_date":"2017-07-21","ids":{"openalex":"https://openalex.org/W2737153395","doi":"https://doi.org/10.1007/s00034-017-0609-3","mag":"2737153395"},"language":"en","primary_location":{"id":"doi:10.1007/s00034-017-0609-3","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s00034-017-0609-3","pdf_url":null,"source":{"id":"https://openalex.org/S20109229","display_name":"Circuits Systems and Signal Processing","issn_l":"0278-081X","issn":["0278-081X","1531-5878"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320186","host_organization_name":"Birkh\u00e4user","host_organization_lineage":["https://openalex.org/P4310320186","https://openalex.org/P4310319900"],"host_organization_lineage_names":["Birkh\u00e4user","Springer Science+Business Media"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Circuits, Systems, and Signal Processing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101564772","display_name":"Subhajit Das","orcid":"https://orcid.org/0000-0002-0251-5556"},"institutions":[{"id":"https://openalex.org/I91277730","display_name":"Maulana Azad National Institute of Technology","ror":"https://ror.org/026vtd268","country_code":"IN","type":"education","lineage":["https://openalex.org/I91277730"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Subhajit Das","raw_affiliation_strings":["Department of Electronics and Communication Engineering, National Institute of Technology, Aizawl, 796 012, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, National Institute of Technology, Aizawl, 796 012, India","institution_ids":["https://openalex.org/I91277730"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5089395601","display_name":"Reshmi Maity","orcid":"https://orcid.org/0000-0002-1254-3075"},"institutions":[{"id":"https://openalex.org/I195459967","display_name":"Mizoram University","ror":"https://ror.org/04b1m3e94","country_code":"IN","type":"education","lineage":["https://openalex.org/I195459967"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Reshmi Maity","raw_affiliation_strings":["Department of Electronics and Communication Engineering, Mizoram University, Aizawl, 796 004, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, Mizoram University, Aizawl, 796 004, India","institution_ids":["https://openalex.org/I195459967"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5082695608","display_name":"N. P. Maity","orcid":"https://orcid.org/0000-0002-1256-5856"},"institutions":[{"id":"https://openalex.org/I195459967","display_name":"Mizoram University","ror":"https://ror.org/04b1m3e94","country_code":"IN","type":"education","lineage":["https://openalex.org/I195459967"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"N. P. Maity","raw_affiliation_strings":["Department of Electronics and Communication Engineering, Mizoram University, Aizawl, 796 004, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, Mizoram University, Aizawl, 796 004, India","institution_ids":["https://openalex.org/I195459967"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5101564772"],"corresponding_institution_ids":["https://openalex.org/I91277730"],"apc_list":null,"apc_paid":null,"fwci":1.7552,"has_fulltext":false,"cited_by_count":28,"citation_normalized_percentile":{"value":0.91237005,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"37","issue":"4","first_page":"1575","last_page":"1593"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10388","display_name":"Advanced Steganography and Watermarking Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10388","display_name":"Advanced Steganography and Watermarking Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11017","display_name":"Chaos-based Image/Signal Encryption","score":0.9969000220298767,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10481","display_name":"Computer Graphics and Visualization Techniques","score":0.98580002784729,"subfield":{"id":"https://openalex.org/subfields/1704","display_name":"Computer Graphics and Computer-Aided Design"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7087772488594055},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6664827466011047},{"id":"https://openalex.org/keywords/critical-path-method","display_name":"Critical path method","score":0.6333444714546204},{"id":"https://openalex.org/keywords/digital-watermarking","display_name":"Digital watermarking","score":0.5075479745864868},{"id":"https://openalex.org/keywords/watermark","display_name":"Watermark","score":0.4885617196559906},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.4761395752429962},{"id":"https://openalex.org/keywords/subtractor","display_name":"Subtractor","score":0.4673483967781067},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.4638614058494568},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.4631020724773407},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.4613950252532959},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.44040486216545105},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.4297301173210144},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4291144013404846},{"id":"https://openalex.org/keywords/image-quality","display_name":"Image quality","score":0.4125306308269501},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.3784745931625366},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3345574140548706},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.33299127221107483},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.18078771233558655},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15222439169883728},{"id":"https://openalex.org/keywords/image","display_name":"Image (mathematics)","score":0.1507476270198822},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.11585164070129395}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7087772488594055},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6664827466011047},{"id":"https://openalex.org/C115874739","wikidata":"https://www.wikidata.org/wiki/Q825377","display_name":"Critical path method","level":2,"score":0.6333444714546204},{"id":"https://openalex.org/C150817343","wikidata":"https://www.wikidata.org/wiki/Q875932","display_name":"Digital watermarking","level":3,"score":0.5075479745864868},{"id":"https://openalex.org/C164112704","wikidata":"https://www.wikidata.org/wiki/Q7974348","display_name":"Watermark","level":3,"score":0.4885617196559906},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.4761395752429962},{"id":"https://openalex.org/C187805909","wikidata":"https://www.wikidata.org/wiki/Q1142401","display_name":"Subtractor","level":4,"score":0.4673483967781067},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.4638614058494568},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.4631020724773407},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.4613950252532959},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.44040486216545105},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.4297301173210144},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4291144013404846},{"id":"https://openalex.org/C55020928","wikidata":"https://www.wikidata.org/wiki/Q3813865","display_name":"Image quality","level":3,"score":0.4125306308269501},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.3784745931625366},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3345574140548706},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.33299127221107483},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.18078771233558655},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15222439169883728},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.1507476270198822},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.11585164070129395},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/s00034-017-0609-3","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s00034-017-0609-3","pdf_url":null,"source":{"id":"https://openalex.org/S20109229","display_name":"Circuits Systems and Signal Processing","issn_l":"0278-081X","issn":["0278-081X","1531-5878"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320186","host_organization_name":"Birkh\u00e4user","host_organization_lineage":["https://openalex.org/P4310320186","https://openalex.org/P4310319900"],"host_organization_lineage_names":["Birkh\u00e4user","Springer Science+Business Media"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Circuits, Systems, and Signal Processing","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":37,"referenced_works":["https://openalex.org/W108834549","https://openalex.org/W197441923","https://openalex.org/W827354566","https://openalex.org/W1482311910","https://openalex.org/W1514631711","https://openalex.org/W1519543599","https://openalex.org/W1557146212","https://openalex.org/W1659626895","https://openalex.org/W1758867092","https://openalex.org/W1966902350","https://openalex.org/W1974641035","https://openalex.org/W1976716483","https://openalex.org/W1987677904","https://openalex.org/W1989518396","https://openalex.org/W2001397147","https://openalex.org/W2032556703","https://openalex.org/W2035200369","https://openalex.org/W2058539732","https://openalex.org/W2061532973","https://openalex.org/W2091448899","https://openalex.org/W2097016194","https://openalex.org/W2099945855","https://openalex.org/W2105673483","https://openalex.org/W2107300816","https://openalex.org/W2117314358","https://openalex.org/W2121036560","https://openalex.org/W2121393355","https://openalex.org/W2126372999","https://openalex.org/W2127185740","https://openalex.org/W2127575575","https://openalex.org/W2132607812","https://openalex.org/W2135459805","https://openalex.org/W2137288380","https://openalex.org/W2151092698","https://openalex.org/W2545226894","https://openalex.org/W3046480354","https://openalex.org/W3046650149"],"related_works":["https://openalex.org/W2541509322","https://openalex.org/W2959321197","https://openalex.org/W4206835326","https://openalex.org/W2782079150","https://openalex.org/W1492116303","https://openalex.org/W1843355381","https://openalex.org/W2069295582","https://openalex.org/W1986121963","https://openalex.org/W56589247","https://openalex.org/W90186386"],"abstract_inverted_index":null,"counts_by_year":[{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":6},{"year":2019,"cited_by_count":10},{"year":2018,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
