{"id":"https://openalex.org/W2612976133","doi":"https://doi.org/10.1007/s00034-017-0571-0","title":"A State-of-the-Art Current Mirror-Based Reliable Wide Fan-in FinFET Domino OR Gate Design","display_name":"A State-of-the-Art Current Mirror-Based Reliable Wide Fan-in FinFET Domino OR Gate Design","publication_year":2017,"publication_date":"2017-05-13","ids":{"openalex":"https://openalex.org/W2612976133","doi":"https://doi.org/10.1007/s00034-017-0571-0","mag":"2612976133"},"language":"en","primary_location":{"id":"doi:10.1007/s00034-017-0571-0","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s00034-017-0571-0","pdf_url":null,"source":{"id":"https://openalex.org/S20109229","display_name":"Circuits Systems and Signal Processing","issn_l":"0278-081X","issn":["0278-081X","1531-5878"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320186","host_organization_name":"Birkh\u00e4user","host_organization_lineage":["https://openalex.org/P4310320186","https://openalex.org/P4310319900"],"host_organization_lineage_names":["Birkh\u00e4user","Springer Science+Business Media"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Circuits, Systems, and Signal Processing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5042431936","display_name":"Vikas Mahor","orcid":"https://orcid.org/0000-0002-1304-4964"},"institutions":[{"id":"https://openalex.org/I9747756","display_name":"Atal Bihari Vajpayee Indian Institute of Information Technology and Management","ror":"https://ror.org/008b3ap06","country_code":"IN","type":"education","lineage":["https://openalex.org/I9747756"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Vikas Mahor","raw_affiliation_strings":["ABV-Indian Institute of Information and Technology, Gwalior, India"],"affiliations":[{"raw_affiliation_string":"ABV-Indian Institute of Information and Technology, Gwalior, India","institution_ids":["https://openalex.org/I9747756"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5038140573","display_name":"Manisha Pattanaik","orcid":"https://orcid.org/0000-0001-7842-0695"},"institutions":[{"id":"https://openalex.org/I9747756","display_name":"Atal Bihari Vajpayee Indian Institute of Information Technology and Management","ror":"https://ror.org/008b3ap06","country_code":"IN","type":"education","lineage":["https://openalex.org/I9747756"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Manisha Pattanaik","raw_affiliation_strings":["ABV-Indian Institute of Information and Technology, Gwalior, India"],"affiliations":[{"raw_affiliation_string":"ABV-Indian Institute of Information and Technology, Gwalior, India","institution_ids":["https://openalex.org/I9747756"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5042431936"],"corresponding_institution_ids":["https://openalex.org/I9747756"],"apc_list":null,"apc_paid":null,"fwci":1.3093,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.81594468,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"37","issue":"2","first_page":"475","last_page":"499"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/domino-logic","display_name":"Domino logic","score":0.6435178518295288},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.5766839981079102},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5744078159332275},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5342169404029846},{"id":"https://openalex.org/keywords/die","display_name":"Die (integrated circuit)","score":0.524894118309021},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.5245328545570374},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.5106516480445862},{"id":"https://openalex.org/keywords/fan-out","display_name":"Fan-out","score":0.5083379149436951},{"id":"https://openalex.org/keywords/domino","display_name":"Domino","score":0.5067840218544006},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.45697081089019775},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.43861377239227295},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.4103561043739319},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3536509871482849},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.2156049907207489},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.12621021270751953},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.12013554573059082},{"id":"https://openalex.org/keywords/mechanical-engineering","display_name":"Mechanical engineering","score":0.07644221186637878}],"concepts":[{"id":"https://openalex.org/C2777555262","wikidata":"https://www.wikidata.org/wiki/Q173391","display_name":"Domino logic","level":5,"score":0.6435178518295288},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.5766839981079102},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5744078159332275},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5342169404029846},{"id":"https://openalex.org/C111106434","wikidata":"https://www.wikidata.org/wiki/Q1072430","display_name":"Die (integrated circuit)","level":2,"score":0.524894118309021},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.5245328545570374},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.5106516480445862},{"id":"https://openalex.org/C68812741","wikidata":"https://www.wikidata.org/wiki/Q636609","display_name":"Fan-out","level":3,"score":0.5083379149436951},{"id":"https://openalex.org/C2776416436","wikidata":"https://www.wikidata.org/wiki/Q3751781","display_name":"Domino","level":3,"score":0.5067840218544006},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.45697081089019775},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.43861377239227295},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.4103561043739319},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3536509871482849},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.2156049907207489},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.12621021270751953},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.12013554573059082},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.07644221186637878},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C161790260","wikidata":"https://www.wikidata.org/wiki/Q82264","display_name":"Catalysis","level":2,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/s00034-017-0571-0","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s00034-017-0571-0","pdf_url":null,"source":{"id":"https://openalex.org/S20109229","display_name":"Circuits Systems and Signal Processing","issn_l":"0278-081X","issn":["0278-081X","1531-5878"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320186","host_organization_name":"Birkh\u00e4user","host_organization_lineage":["https://openalex.org/P4310320186","https://openalex.org/P4310319900"],"host_organization_lineage_names":["Birkh\u00e4user","Springer Science+Business Media"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Circuits, Systems, and Signal Processing","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Sustainable cities and communities","id":"https://metadata.un.org/sdg/11","score":0.44999998807907104}],"awards":[],"funders":[{"id":"https://openalex.org/F4320321071","display_name":"Department of Electronics and Information Technology, Ministry of Communications and Information Technology","ror":"https://ror.org/02z31cn83"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W981656005","https://openalex.org/W1157979147","https://openalex.org/W1862469596","https://openalex.org/W1972698239","https://openalex.org/W1982515552","https://openalex.org/W1989974213","https://openalex.org/W2028789136","https://openalex.org/W2078854425","https://openalex.org/W2083124406","https://openalex.org/W2086342250","https://openalex.org/W2093855145","https://openalex.org/W2100115371","https://openalex.org/W2122606532","https://openalex.org/W2126061723","https://openalex.org/W2134067926","https://openalex.org/W2144274936","https://openalex.org/W2155030732","https://openalex.org/W2168881792","https://openalex.org/W2173367578","https://openalex.org/W2397758652"],"related_works":["https://openalex.org/W3174071739","https://openalex.org/W2150513440","https://openalex.org/W2168226525","https://openalex.org/W2100009051","https://openalex.org/W1498239474","https://openalex.org/W2119842574","https://openalex.org/W2397758652","https://openalex.org/W2206092221","https://openalex.org/W2074296439","https://openalex.org/W3012367613"],"abstract_inverted_index":null,"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}