{"id":"https://openalex.org/W2131891727","doi":"https://doi.org/10.1007/s00034-011-9343-4","title":"Set-Reset Flip-Flop Circuit with a Simple Output Logic","display_name":"Set-Reset Flip-Flop Circuit with a Simple Output Logic","publication_year":2011,"publication_date":"2011-08-19","ids":{"openalex":"https://openalex.org/W2131891727","doi":"https://doi.org/10.1007/s00034-011-9343-4","mag":"2131891727"},"language":"en","primary_location":{"id":"doi:10.1007/s00034-011-9343-4","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s00034-011-9343-4","pdf_url":null,"source":{"id":"https://openalex.org/S20109229","display_name":"Circuits Systems and Signal Processing","issn_l":"0278-081X","issn":["0278-081X","1531-5878"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320186","host_organization_name":"Birkh\u00e4user","host_organization_lineage":["https://openalex.org/P4310320186","https://openalex.org/P4310319900"],"host_organization_lineage_names":["Birkh\u00e4user","Springer Science+Business Media"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Circuits, Systems, and Signal Processing","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5067058129","display_name":"I. Campos-Cant\u00f3n","orcid":"https://orcid.org/0000-0002-3189-3417"},"institutions":[{"id":"https://openalex.org/I196664497","display_name":"Autonomous University of San Luis Potos\u00ed","ror":"https://ror.org/000917t60","country_code":"MX","type":"education","lineage":["https://openalex.org/I196664497"]}],"countries":["MX"],"is_corresponding":false,"raw_author_name":"I. Campos-Cant\u00f3n","raw_affiliation_strings":["Facultad de Ciencias, Universidad Aut\u00f3noma de San Luis Potos\u00ed, Alvaro Obreg\u00f3n 64, 78000, San Luis Potos\u00ed, SLP, Mexico","Universidad Aut\u00f3noma de San Luis Potos\u0131"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Facultad de Ciencias, Universidad Aut\u00f3noma de San Luis Potos\u00ed, Alvaro Obreg\u00f3n 64, 78000, San Luis Potos\u00ed, SLP, Mexico","institution_ids":["https://openalex.org/I196664497"]},{"raw_affiliation_string":"Universidad Aut\u00f3noma de San Luis Potos\u0131","institution_ids":["https://openalex.org/I196664497"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026628940","display_name":"E. Campos-Cant\u00f3n","orcid":"https://orcid.org/0000-0002-1098-1610"},"institutions":[{"id":"https://openalex.org/I147482076","display_name":"Institute for Scientific and Technological Research","ror":"https://ror.org/03sbzv212","country_code":"MX","type":"funder","lineage":["https://openalex.org/I147482076"]}],"countries":["MX"],"is_corresponding":false,"raw_author_name":"E. Campos-Cant\u00f3n","raw_affiliation_strings":["IPICyT, Instituto Potosino de Investigacion Cientifica y Tecnologica, Camino a la Presa San Jos\u00e9 2055, Col. Lomas 4a secci\u00f3n, C.P. 78216, San Luis Potos\u00ed, SLP, Mexico","IPICYT, Instituto Potosino de Investigacion Cientifica y Tecnologica"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IPICyT, Instituto Potosino de Investigacion Cientifica y Tecnologica, Camino a la Presa San Jos\u00e9 2055, Col. Lomas 4a secci\u00f3n, C.P. 78216, San Luis Potos\u00ed, SLP, Mexico","institution_ids":["https://openalex.org/I147482076"]},{"raw_affiliation_string":"IPICYT, Instituto Potosino de Investigacion Cientifica y Tecnologica","institution_ids":["https://openalex.org/I147482076"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049907996","display_name":"H. C. Rosu","orcid":"https://orcid.org/0000-0001-5909-1945"},"institutions":[{"id":"https://openalex.org/I147482076","display_name":"Institute for Scientific and Technological Research","ror":"https://ror.org/03sbzv212","country_code":"MX","type":"funder","lineage":["https://openalex.org/I147482076"]}],"countries":["MX"],"is_corresponding":true,"raw_author_name":"H. C. Rosu","raw_affiliation_strings":["IPICyT, Instituto Potosino de Investigacion Cientifica y Tecnologica, Camino a la Presa San Jos\u00e9 2055, Col. Lomas 4a secci\u00f3n, C.P. 78216, San Luis Potos\u00ed, SLP, Mexico","IPICYT, Instituto Potosino de Investigacion Cientifica y Tecnologica"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IPICyT, Instituto Potosino de Investigacion Cientifica y Tecnologica, Camino a la Presa San Jos\u00e9 2055, Col. Lomas 4a secci\u00f3n, C.P. 78216, San Luis Potos\u00ed, SLP, Mexico","institution_ids":["https://openalex.org/I147482076"]},{"raw_affiliation_string":"IPICYT, Instituto Potosino de Investigacion Cientifica y Tecnologica","institution_ids":["https://openalex.org/I147482076"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5044238648","display_name":"E. Castellanos-Velasco","orcid":null},"institutions":[{"id":"https://openalex.org/I196664497","display_name":"Autonomous University of San Luis Potos\u00ed","ror":"https://ror.org/000917t60","country_code":"MX","type":"education","lineage":["https://openalex.org/I196664497"]}],"countries":["MX"],"is_corresponding":false,"raw_author_name":"E. Castellanos-Velasco","raw_affiliation_strings":["Facultad de Ciencias, Universidad Aut\u00f3noma de San Luis Potos\u00ed, Alvaro Obreg\u00f3n 64, 78000, San Luis Potos\u00ed, SLP, Mexico","Universidad Aut\u00f3noma de San Luis Potos\u0131"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Facultad de Ciencias, Universidad Aut\u00f3noma de San Luis Potos\u00ed, Alvaro Obreg\u00f3n 64, 78000, San Luis Potos\u00ed, SLP, Mexico","institution_ids":["https://openalex.org/I196664497"]},{"raw_affiliation_string":"Universidad Aut\u00f3noma de San Luis Potos\u0131","institution_ids":["https://openalex.org/I196664497"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5049907996"],"corresponding_institution_ids":["https://openalex.org/I147482076"],"apc_list":{"value":3190,"currency":"USD","value_usd":3190},"apc_paid":null,"fwci":0.2331,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.65562496,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"31","issue":"2","first_page":"753","last_page":"760"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11975","display_name":"Evolutionary Algorithms and Applications","score":0.9958000183105469,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/flip-flop","display_name":"Flip-flop","score":0.8092712759971619},{"id":"https://openalex.org/keywords/reset","display_name":"Reset (finance)","score":0.7127072811126709},{"id":"https://openalex.org/keywords/simple","display_name":"Simple (philosophy)","score":0.6934277415275574},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.5075086951255798},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.5063921213150024},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4966786503791809},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.4957023859024048},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4441666007041931},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.44348108768463135},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.43368256092071533},{"id":"https://openalex.org/keywords/variable","display_name":"Variable (mathematics)","score":0.4325324296951294},{"id":"https://openalex.org/keywords/flip","display_name":"Flip","score":0.41935789585113525},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.41132330894470215},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.3996729850769043},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.36503371596336365},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3349912762641907},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.29187828302383423},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.15253639221191406},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.1426195204257965},{"id":"https://openalex.org/keywords/mathematical-analysis","display_name":"Mathematical analysis","score":0.13142293691635132},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12272369861602783},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.08537265658378601},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.06155359745025635}],"concepts":[{"id":"https://openalex.org/C2781007278","wikidata":"https://www.wikidata.org/wiki/Q183406","display_name":"Flip-flop","level":3,"score":0.8092712759971619},{"id":"https://openalex.org/C2779795794","wikidata":"https://www.wikidata.org/wiki/Q7315343","display_name":"Reset (finance)","level":2,"score":0.7127072811126709},{"id":"https://openalex.org/C2780586882","wikidata":"https://www.wikidata.org/wiki/Q7520643","display_name":"Simple (philosophy)","level":2,"score":0.6934277415275574},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.5075086951255798},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.5063921213150024},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4966786503791809},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.4957023859024048},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4441666007041931},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.44348108768463135},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.43368256092071533},{"id":"https://openalex.org/C182365436","wikidata":"https://www.wikidata.org/wiki/Q50701","display_name":"Variable (mathematics)","level":2,"score":0.4325324296951294},{"id":"https://openalex.org/C2776591724","wikidata":"https://www.wikidata.org/wiki/Q5459651","display_name":"Flip","level":3,"score":0.41935789585113525},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.41132330894470215},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.3996729850769043},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.36503371596336365},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3349912762641907},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.29187828302383423},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.15253639221191406},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.1426195204257965},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.13142293691635132},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12272369861602783},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.08537265658378601},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.06155359745025635},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C106159729","wikidata":"https://www.wikidata.org/wiki/Q2294553","display_name":"Financial economics","level":1,"score":0.0},{"id":"https://openalex.org/C190283241","wikidata":"https://www.wikidata.org/wiki/Q14599311","display_name":"Apoptosis","level":2,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1007/s00034-011-9343-4","is_oa":false,"landing_page_url":"https://doi.org/10.1007/s00034-011-9343-4","pdf_url":null,"source":{"id":"https://openalex.org/S20109229","display_name":"Circuits Systems and Signal Processing","issn_l":"0278-081X","issn":["0278-081X","1531-5878"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310320186","host_organization_name":"Birkh\u00e4user","host_organization_lineage":["https://openalex.org/P4310320186","https://openalex.org/P4310319900"],"host_organization_lineage_names":["Birkh\u00e4user","Springer Science+Business Media"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Circuits, Systems, and Signal Processing","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1966410745","https://openalex.org/W1996923406","https://openalex.org/W2001404477","https://openalex.org/W2002579610","https://openalex.org/W2014873207","https://openalex.org/W2023726568","https://openalex.org/W2037158013","https://openalex.org/W2068959528","https://openalex.org/W2071915767","https://openalex.org/W2082457558","https://openalex.org/W2086805106","https://openalex.org/W2088223850","https://openalex.org/W2094525414","https://openalex.org/W2104100022","https://openalex.org/W2106736686","https://openalex.org/W3098095110","https://openalex.org/W4230275764"],"related_works":["https://openalex.org/W2944644673","https://openalex.org/W2936325888","https://openalex.org/W2596383653","https://openalex.org/W2482318635","https://openalex.org/W2733322820","https://openalex.org/W4256254028","https://openalex.org/W4236067172","https://openalex.org/W4248274330","https://openalex.org/W4301360729","https://openalex.org/W3142006478"],"abstract_inverted_index":null,"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2026-08-21T09:56:20.448147","created_date":"2025-10-10T00:00:00"}